Non-Volatile Memory Defect Detection Using Resistive State Error Counting
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Solution Overview
Problem
Existing storage systems fail to accurately detect defective pages in non-volatile memory due to the lack of consideration for error property differences between low resistive states (LRS) and high resistive states (HRS), leading to incorrect identification of defective or non-defective pages.
Innovation Solution
A storage control apparatus with a determination unit that assesses memory cells based on error counts during reset and set operations, considering error property differences to identify defective cells, and a management unit for reconfirming and managing suspected defective pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If error bits are counted without consideration of error property difference between LRS and HRS, then the counting process is simple, but defective pages cannot be accurately detected
Solution Approach 1:
The patent segments the error counting process into two independent counters: one for LRS errors and one for HRS errors. This segmentation allows each counter to track errors specific to its resistive state, enabling accurate defective page detection by comparing error counts against state-specific thresholds, while maintaining relatively simple counter implementation.
Solution Approach 2:
The patent applies local quality by establishing different error thresholds for LRS and HRS states. Instead of using a uniform threshold, the system recognizes that LRS and HRS have different error characteristics and applies localized quality control through state-specific threshold values, thereby improving detection accuracy without significantly increasing complexity.
2Reliability
If uniform error threshold is used for both LRS and HRS, then the threshold management is simple, but detection accuracy varies depending on device characteristics
Solution Approach 1:
The patent implements local quality by defining separate error thresholds for LRS and HRS states. The threshold management unit maintains two distinct threshold values (first threshold for LRS, second threshold for HRS) that reflect the different error characteristics of each state, thereby improving detection reliability while keeping the threshold management structure relatively simple and organized.
Solution Approach 2:
The patent applies parameter changes by allowing the error threshold parameter to vary depending on the resistive state. The threshold management unit selects appropriate threshold values based on whether the error occurred in LRS or HRS, thereby adapting the detection criteria to match device-specific error characteristics and improving overall reliability.
Data Source
AI summary
Detecting a defective cell in a memory in consideration of an error property difference depending on the storage state. A determination unit determines whether there is a possibility of defect for each of unit-of-storages on a memory cell formed with a non-volatile memory. The non-volatile memory undergoes either a reset operation that transitions a state from a low resistive state (LRS) to a high resistive state (HRS) or a set operation that transitions the state from the high resistive state to the low resistive state. The determination unit determines a unit-of-storage in which the number of errors in predetermined one of the reset operation and the set operation has exceeded a predetermined standard, as a unit-of-storage suspected of having a defect.