Nonvolatile Memory Module ECC Distribution

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Solution Overview

Problem

Nonvolatile memory modules, such as NAND-type flash memory modules, face increased error bit counts due to micronization and multi-valuing, leading to reduced reliability and a decreased allowable erasing frequency, which limits data rewriting capabilities.

Innovation Solution

The solution involves dividing error correction codewords into multiple portions and distributing them across multiple storage areas within the module, leveling the error bit count across different memory units to simplify control and enhance reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple ECCs of different sizes are applied to different pages, then data correction capability is improved, but control complexity and management difficulty increase

Engineering Contradiction:
Improvedata correction capabilityVSAvoidcontrol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by differentiating storage areas into reliable and unreliable categories based on their error bit counts, and assigning different ECC sizes to each category. This allows optimized error correction for each storage area while managing complexity through clear classification and standardized management procedures.

Inventive Principle:
Principle #3Local quality

2Reliability

If ECC in large size is applied to pages with many error bits, then data correction capability is improved, but storage space efficiency decreases

Engineering Contradiction:
Improvedata correction capabilityVSAvoidstorage space efficiency
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by differentiating storage areas into reliable and unreliable categories based on their error bit counts, and assigning different ECC sizes to each category. This allows optimized error correction for each storage area while managing complexity through clear classification and standardized management procedures.

Inventive Principle:
Principle #3Local quality

3Reliability

If data is recorded in storage areas with high error bit counts, then data integrity is compromised, but usable storage capacity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidusable storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments storage areas into reliable and unreliable categories based on error bit counts, and applies different ECC sizes to each segment. This segmentation allows the system to maximize usable capacity by utilizing all storage areas while maintaining data integrity through appropriate ECC protection levels for each segment.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10635534B2Nonvolatile memory module
Publication Date: 2020.04.28 HITACHI VANTARA LTD
  • US10635534B2 patent drawing
  • US10635534B2 patent drawing
  • US10635534B2 patent drawing

AI summary

In technique for dividing ECC large in size, plural ECCs of different sizes are required to be managed and control over storage areas of NVM is intricate. In addition, a relatively reliable page (a minimum record unit) and a relatively unreliable page are determined beforehand depending upon which recording method is adopted. However, as dispersion exists in quality among NVMs, it may occur among NVMs that dispersion in an error bit count is great among pages of the same reliability. An NVM controller in a nonvolatile memory (NVM) module divides the ECCCW into N pieces (N: two or a larger integer) of ECCCW portions and records the N pieces of ECCCW portions in N pieces of storage areas out of plural storage areas in one or more NVMs configuring an NVM section.