Non-Volatile RAM Error Re-mapping via Page Map Table
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Solution Overview
Problem
Non-volatile RAM faces cell failure due to finite endurance, leading to read errors and accumulated errors that burden error correcting codes, which are not effectively addressed by existing solutions, especially in fast and contiguous random access memory systems.
Innovation Solution
A method and apparatus for detecting errors in non-volatile memory cells, storing error information in a table, and re-mapping page addresses to new pages when errors exceed a threshold, using a processor and error correcting code circuit in conjunction with a re-mapper to redirect memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correcting code (ECC) circuit is used to correct accumulated errors in NV RAM, then error correction capability is improved, but more parity check bits are required increasing memory overhead
Solution Approach 1:
The invention segments the error handling approach by dividing memory into pages and tracking errors at the page level rather than requiring full ECC protection for every possible error pattern. The page error status table segments error tracking into manageable units, allowing selective remapping only for affected pages rather than requiring comprehensive parity bits across the entire memory space.
Solution Approach 2:
The invention introduces an intermediary page error status table and remapper mechanism between the physical memory cells and the logical memory access. This intermediary layer tracks error accumulation and handles remapping transparently, eliminating the need for additional parity check bits while maintaining error correction capability through the mediating remapper that redirects accesses away from failed pages.
2Reliability
If failing cells are marked and not used (as in NAND flash), then read errors are prevented, but memory holes are created breaking physical contiguity and random access capability
Solution Approach 1:
The invention creates a logical copy or mapping layer that preserves the original memory address space while redirecting accesses. The remapper maintains a mapping between logical page addresses and physical page locations, allowing the system to present a contiguous address space to the processor even when physical pages are remapped to different locations, thus preserving random access capability without creating memory holes.
Solution Approach 2:
The memory mapping is made dynamic through the remapper, which can adaptively redirect page accesses based on current error status. Rather than creating static memory holes, the system dynamically remaps only the affected pages while maintaining the illusion of a contiguous address space, preserving random access performance and physical contiguity from the processor's perspective.
3Productivity
If NV RAM operates at high speed with random access requirement, then performance is improved, but marking failed cells as in slow memories is not suitable
Solution Approach 1:
The system performs preliminary error detection and page remapping actions before the processor encounters read errors during normal operation. The page error status table is proactively updated when errors are detected, and the remapper is pre-configured with alternative page mappings, allowing the processor to continue high-speed operations without interruption or performance degradation from error handling.
Solution Approach 2:
The memory system provides self-service error handling through automatic error detection, page error status table updates, and transparent remapping operations. The ECC circuit automatically detects errors, the system automatically updates the page error status table, and the remapper automatically redirects accesses, all without processor intervention, maintaining high-speed operation while reliably handling accumulated errors.
Data Source
AI summary
A memory module comprising a non-volatile cell array and a re-mapper. A page map table is stored in the non-volatile cell array, and includes mappings of old page addresses to new page addresses. The re-mapper is configured to direct memory operations referencing an old page address to the new page address that the old page address is mapped to. The mappings are created when a memory cell is determined to be in a failure state.