Non-volatile Memory Error-Reduced Read Modes

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor memory systems are limited in their ability to handle applications that do not require 100% error-free data, as they are designed to return either fully decoded data or error messages, failing to provide partially decoded data that could be acceptable in applications like video or audio streaming.

Innovation Solution

A non-volatile memory system configured to return 'error-reduced' data based on a quality of service indication, implementing various read modes that balance error rates, power consumption, and decoding time to meet specific performance targets, rather than solely aiming for error-free data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system performs complete error correction decoding, then data reliability is improved, but decoding time and power consumption increase

Engineering Contradiction:
Improvedata error-free guaranteeVSAvoiddecoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by implementing multiple read modes that perform different levels of error correction. The first read mode performs complete error correction decoding to ensure data reliability, while the second read mode performs partial or no error correction to reduce decoding time. This allows the system to select the appropriate level of correction based on application requirements, thereby resolving the contradiction between reliability and decoding time.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If the memory system performs complete error correction decoding, then data reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata error-free guaranteeVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements partial error correction in the second read mode, performing only sufficient correction to meet application-specific error rate requirements rather than achieving complete error-free data. This partial correction approach reduces power consumption while maintaining adequate reliability for applications like video or audio streaming where perfect error-free data is not critical.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If the memory system returns error-free data only, then data quality is improved, but data availability decreases for applications tolerating errors

Engineering Contradiction:
Improvedata error-free statusVSAvoidapplication compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic adaptability by providing multiple read modes that can be selected based on application requirements. The system can dynamically switch between the first read mode (complete error correction) and the second read mode (partial or no error correction) depending on the specific application's tolerance for errors. This makes the memory system versatile enough to serve both applications requiring error-free data and applications that can tolerate some errors, such as multimedia streaming.

Inventive Principle:
Principle #15Dynamics

4Manufacturing precision

If the memory system performs thorough error correction, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoding system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the error correction process into multiple levels or modes. The first read mode implements thorough error correction decoding for high precision requirements, while the second read mode implements reduced or selective error correction for lower precision requirements. This segmentation allows the system to provide different levels of manufacturing precision without requiring a completely different decoding architecture, thereby managing device complexity while maintaining error correction capabilities.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10223199B2Non-volatile memory configured to return error reduced read data
Publication Date: 2019.03.05 SANDISK TECHNOLOGIES LLC
  • US10223199B2 patent drawing
  • US10223199B2 patent drawing
  • US10223199B2 patent drawing

AI summary

A non-volatile memory system receives a request to read data. That request includes a quality of service indication. The memory system performs a read process that satisfies the quality of service indication and identifies a set of data with errors. The memory system returns the set of data with errors in response to the request.