NVM Express Storage Device Write Error Detection via Data Invalidation

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Solution Overview

Problem

In storage systems using the NVM Express protocol, where the processor directly connects to the storage device without a protocol control unit, there is an increased load on the processor for data protection code and identifier management, leading to performance degradation and difficulty in detecting write errors without high overhead checks.

Innovation Solution

The system transmits a data invalidating command to the storage device before writing data, allowing the device to invalidate the data area and maintain it in an invalid state if the write fails, enabling efficient error detection without re-reading data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the processor directly connects to the storage device using NVM Express protocol without a protocol control unit, then the device complexity is reduced, but the processor load increases due to the need to assign and check data protection codes and identifiers

Engineering Contradiction:
Improveprotocol control unitVSAvoidprocessor load
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent extracts the data protection code assignment and checking functions from the processor to a dedicated error detection device. This separates the complex error handling tasks from the main processor, reducing processor load while maintaining the simplified NVM Express protocol architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The error detection device performs multiple functions: it assigns data protection codes to write commands, checks read commands for proper code inclusion, and validates written data. This multi-functional approach consolidates error handling tasks that would otherwise burden the processor.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the processor assigns and checks data protection codes and identifiers under NVM Express protocol, then data transmission correctness is improved, but the processor load increases leading to performance degradation

Engineering Contradiction:
Improvedata transmission correctnessVSAvoidprocessor load
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the data protection code assignment and checking functions from the processor to a dedicated error detection device. This separates the complex error handling tasks from the main processor, reducing processor load while maintaining the simplified NVM Express protocol architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The error detection device acts as an intermediary between the processor and storage device, handling all data protection code assignments and validations. This mediator approach ensures reliable data transmission without burdening the processor with these specialized tasks.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the storage device itself checks whether write data has been correctly transmitted and written, then the processor load is reduced, but the storage device cannot detect loss of write data due to temporary errors in itself

Engineering Contradiction:
Improveprocessor loadVSAvoiderror detection capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The error detection device acts as an intermediary between the processor and storage device, handling all data protection code assignments and validations. This mediator approach ensures reliable data transmission without burdening the processor with these specialized tasks.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback through data protection codes that accompany write commands and are verified after writing. The error detection device uses these codes to provide feedback on whether data was correctly written, enabling the storage device to detect its own temporary errors while keeping the processor load low.

Inventive Principle:
Principle #23Feedback

4Reliability

If data is temporarily written into the storage device and then read again to check correctness, then write error detection is improved, but the overhead increases significantly

Engineering Contradiction:
Improvewrite error detectionVSAvoidoverhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by assigning data protection codes to write commands before the actual data writing occurs. This pre-prepared verification mechanism allows for immediate error detection upon completion without requiring time-consuming re-reading of the data.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical approach of re-reading data to verify writing with a computational approach using data protection codes. Instead of physically re-accessing and comparing data blocks, the system uses code validation to substitute for the lengthy re-reading process, significantly reducing overhead.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11269703B2Information processing system and storage device control method to determine whether data has been correctly written into a storage device
Publication Date: 2022.03.08 HITACHI VANTARA LTD
  • US11269703B2 patent drawing
  • US11269703B2 patent drawing
  • US11269703B2 patent drawing

AI summary

It is detected whether write data has been correctly transmitted to a storage device under a protocol for directly connecting the storage device to a processor. An information processing system including: a processor; a memory; and a storage device, the processor first transmitting to the storage device, a command to invalidate data in a data area and which is designated by a write command, the storage device invalidating the data, the processor second transmitting to the storage device, the write command to write the data into the data area, and the storage device writing the data into the data area in accordance with the write command, validating the data in a data area into which the storage device has been successful in writing the data, and maintaining the data invalidated in a data area into which the storage device has failed in writing the data.