Direct NVM to GPU Local Memory Transfer via PCIe Switch
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Solution Overview
Problem
The existing data transfer process between non-volatile memory (NVM) and local memory associated with a graphics processing unit (GPU) involves a two-hop process, first transferring data through system memory, which increases traffic and congestion, requiring involvement of the host system's root complex and system memory.
Innovation Solution
A method and system that enables direct data transfer between NVM and local memory by bypassing the host system's root complex and system memory, using a local PCIe switch to initiate the transfer from the NVM controller, allowing a single-hop data transfer process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data transfer uses the traditional two-hop process through system memory, then data can be transferred between NVM and local memory, but system latency increases and performance decreases
Solution Approach 1:
The patent segments the data transfer path by introducing a local PCIe switch that creates a dedicated transfer channel between NVM and local memory, separating this traffic from the main system memory bus. This segmentation allows simultaneous operations without interference, reducing latency and improving transfer performance.
Solution Approach 2:
The local PCIe switch acts as an intermediary device that enables direct communication between NVM and local memory. It mediates the data transfer by receiving data from NVM and routing it directly to local memory without requiring system memory as an intermediate storage location, thereby eliminating the two-hop process.
2Quantity of substance
If data transfer involves the host system's root complex and system memory, then data can be transferred between NVM and local memory, but system traffic increases and congestion occurs
Solution Approach 1:
The patent segments system traffic by creating a dedicated data transfer path through the local PCIe switch. This separates NVM-to-local-memory transfers from general system memory traffic, preventing congestion on the main system bus and enabling parallel operations without interference.
Solution Approach 2:
The local PCIe switch serves as an intermediary that handles NVM data transfers locally, preventing these transfers from entering the main system memory subsystem. This intermediary function isolates the transfer traffic from system-wide congestion, maintaining ease of operation while reducing overall system traffic load.
3Use of energy by moving object
If the host processor manages memory transfers, then data can be transferred between NVM and local memory, but resource usage increases and efficiency decreases
Solution Approach 1:
The patent implements self-service by enabling the local PCIe switch and NVM controller to autonomously manage data transfers between NVM and local memory. The host processor only initiates the transfer by setting a bit in a register, after which the local components handle the entire transfer process independently, significantly reducing host processor resource usage while maintaining high transfer efficiency.
Solution Approach 2:
The patent segments the memory management function by separating host processor responsibilities from local memory transfer responsibilities. The local PCIe switch and NVM controller form an independent subsystem that handles transfers autonomously, allowing the host processor to focus on higher-level tasks and improving overall system efficiency.
Data Source
AI summary
Described herein is a method and system for directly accessing and transferring data between a first memory architecture and a second memory architecture associated with a graphics processing unit (GPU) by treating the first memory architecture, the second memory architecture and system memory as a single physical memory, where the first memory architecture is a non-volatile memory (NVM) and the second memory architecture is a local memory. Upon accessing a virtual address (VA) range by a processor, the requested content is paged in from the single physical memory and is then redirected by a virtual storage driver to the second memory architecture or the system memory, depending on which of the GPU or CPU triggered the access request. The memory transfer occurs without awareness of the application and the operating system.