Non-Volatile Memory Redundancy via Data Inversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing redundancy schemes for non-volatile memories require significant additional logic, increasing chip area and logic overhead, which is not optimal for maximizing manufacturing yield and minimizing cost.
Innovation Solution
A redundancy method that identifies defective cells in non-volatile memory arrays and programs them to store inverted data, using an inversion status cell to manage data integrity and correct for defects during read operations, thereby reclaims defective cells and maintains data accuracy without additional logic overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional redundancy schemes are used to handle defective cells, then manufacturing yield is improved, but chip area and logic overhead increase significantly
Solution Approach 1:
The patent applies inversion by storing the complement (inverted) version of data in defective cells instead of attempting to store the original data. When a cell is defective and cannot store a particular logic state reliably, the system stores the opposite state and inverts it during read operations. This allows defective cells to be reclaimed and used, improving manufacturing yield without requiring additional redundancy logic or chip area.
Solution Approach 2:
The patent creates a copy of the data in inverted form within the same defective cell structure. Instead of adding separate redundancy cells or duplicate storage structures, the system copies the inverted data into the defective cell's storage mechanism, allowing the same physical structure to serve both primary storage and redundancy functions.
2Reliability
If traditional redundancy schemes are used to handle defective cells, then manufacturing yield is improved, but logic overhead increases significantly
Solution Approach 1:
The patent implements self-service by having the memory controller automatically detect defective cells during initialization and dynamically adjust the inversion status for each cell group. The system serves itself by identifying defects and reconfiguring the storage logic without requiring external redundancy management circuits, parity check logic, or additional error correction code mechanisms.
Solution Approach 2:
The patent changes the inversion status parameter for each cell group based on detected defects. By dynamically adjusting whether data should be stored or read in inverted form, the system adapts to defective cells without adding complex redundancy logic. This parameter-based approach replaces traditional redundancy schemes with simple state flips.
3Area of stationary object
If defective cells are reclaimed by storing inverted data, then chip area is reduced, but data integrity management becomes more complex
Solution Approach 1:
The patent performs preliminary action by detecting defective cells and establishing inversion status for each cell group during memory initialization, before any actual data storage occurs. This upfront configuration creates a lookup table or status register that maps cell groups to their inversion requirements, so that during normal operation, the memory controller simply applies the pre-determined inversion status without complex real-time analysis.
Data Source
AI summary
A redundancy scheme for Non-Volatile Memories (NVM) is described. This redundancy scheme provides means for using defective cells in non-volatile memories to increase yield. The algorithm is based on inverting the program data for data being programmed to a cell grouping when a defective cell is detected in the cell grouping. Defective cells are biased to either “1” or “0” logic states, which are effectively preset to store its biased logic state. A data bit to be stored in a defective cell having a logic state that is complementary to the biased logic state of the cell results in the program data being inverted and programmed. An inversion status bit is programmed to indicate the inverted status of the programmed data. During read out, the inversion status bit causes the stored data to be re-inverted into its original program data states.