Non-volatile Memory Leakage Detection Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional leakage current testing in memory devices is time-consuming and costly, particularly as die capacity increases, and often requires specialized testers, making it inefficient for detecting unacceptable leakage current in word lines.
Innovation Solution
A method utilizing a leakage detection circuit with a current mirror and successive approximation analog to digital conversion (SAR ADC) to rapidly detect leakage current by comparing a reference code with a leakage code generated from word lines, allowing for quick identification of unusable storage blocks without a tester.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional leakage current testing is performed, then storage blocks can be identified as bad blocks, but testing time increases significantly (9% of total test time)
Solution Approach 1:
The memory device performs leakage current testing on itself using an integrated leakage detection circuit, eliminating the need for external testers. The device self-tests by applying voltage to word lines through the detection circuit and comparing resulting currents against reference values stored in non-volatile memory, thereby reducing external testing time and equipment requirements.
Solution Approach 2:
The patent replaces conventional external tester equipment with an integrated electronic leakage detection circuit that uses current mirror comparison and SAR ADC conversion. This substitution of physical testing equipment with integrated electronic circuitry enables faster, automated leakage detection within the memory device itself.
2Quantity of substance
If die capacity increases, then storage capacity improves, but the number of storage blocks and word lines increases, further adding to testing time
Solution Approach 1:
The leakage detection circuit segments the testing process by testing multiple word lines in parallel through the parallel current mirror circuitry. Instead of sequentially testing each word line, the circuit simultaneously compares currents from multiple word lines against reference values, reducing total test time as die capacity increases.
Solution Approach 2:
Reference current values are pre-stored in non-volatile memory during manufacturing or initialization. These pre-stored reference values enable rapid comparison during subsequent leakage testing without requiring time-consuming reference establishment, allowing the device to quickly identify bad blocks even as die capacity increases.
3Reliability
If conventional leakage testing is performed, then leakage current can be detected, but specialized testers are required, increasing testing costs
Solution Approach 1:
The memory device incorporates its own leakage detection circuitry that includes current mirror circuitry, SAR ADC conversion, and non-volatile memory for reference storage. This self-contained capability eliminates the need for specialized external testers, reducing testing infrastructure complexity and costs while maintaining reliable leakage detection.
Solution Approach 2:
The leakage detection circuit serves multiple functions: it tests leakage current, stores reference values in non-volatile memory, performs SAR ADC conversion, and compares results against references. This multi-functional integrated circuit replaces what would traditionally require separate specialized testing equipment, reducing overall system complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces leakage current testing time to between 0.5% and 2.1% of previous solutions, enabling faster integration of memory devices and reducing testing costs by eliminating the need for specialized equipment.
Implementation Method 1
The current mirror circuit is coupled to the word line voltage from the driver circuit and further coupled to the current control circuit. The current mirror circuit mirrors the reference current supplied by the current control circuit and the memory current from the set of word lines.
Implementation Method 2
The resistor is connected in series between the current mirror circuit and a SAR ADC circuit. The resistor transforms one of the reference current and the memory current into a leakage detection voltage.
Implementation Method 3
The SAR ADC circuit receives the leakage detection voltage and generates a digital output code based on the leakage detection voltage.
Data Source
AI summary
An apparatus and method for detecting leakage current in a non-volatile memory array. A reference current is connected to a leakage detection circuit. A reference code is determined for the leakage detection circuit coupled to a switching circuit. The reference code establishes a leakage current threshold. The reference current is disconnected from the leakage detection circuit and the switching circuit. Next, the leakage detection circuit is connected to a set of word lines of a storage block of a non-volatile memory array by way of the switching circuit. A memory current is generated within the set of word lines. A leakage code is determined for the set of word lines representing leakage current from the word lines in response to the memory current. The leakage code is compared with the reference code. If the leakage code exceeds the reference code, the storage block is deemed unusable.