Non-Volatile Memory Noise Injection for DNN Testing
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Solution Overview
Problem
Deep learning neural networks (DNNs) face challenges in effectively testing their robustness and performance on noisy data, as existing methods lack efficient mechanisms for injecting controlled noise into data sets, which is crucial for training and testing purposes.
Innovation Solution
The implementation of non-volatile memory (NVM) arrays with integrated processing circuitry that reads data, generates stochastic noise, and combines it with original data to create noisy datasets, allowing for various noise injection methods such as adjusting read voltages, XORing with random data, and simulating dead CCD pixels, thereby enabling controlled data degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional data storage and processing methods are used, then data can be stored and retrieved, but controlled noise injection capability is lacking
Solution Approach 1:
The patent combines the noise injection functionality directly into the memory device by integrating a noise generation unit and a combination unit within the memory controller. This merging approach allows the memory device to simultaneously perform data storage and controlled noise injection without requiring separate external noise generation systems, thereby enhancing adaptability while managing system complexity.
Solution Approach 2:
The memory device is designed with multi-functional capability, serving both as a data storage device and as a noise injection device for data degradation. The processing circuitry can selectively switch between normal data operations and noise injection operations, making the device universal and eliminating the need for separate specialized noise generation equipment.
2Adaptability or versatility
If noise is injected into data sets, then DNN robustness testing is enabled, but data quality is degraded
Solution Approach 1:
The noise injection process is designed to be dynamic and controllable, allowing the noise characteristics (type, amount, distribution) to be adjusted based on testing requirements. The processing circuitry can selectively apply different noise injection modes and control the degradation level, enabling flexible trade-offs between data quality and testing effectiveness.
Solution Approach 2:
The patent implements controllable parameter changes in the noise injection process, where the noise characteristics can be modified through configurable parameters such as noise type (Gaussian, salt-and-pepper, dead pixel simulation), noise density, and injection probability. This allows precise control over the degree of data degradation to match specific testing scenarios.
3Adaptability or versatility
If external noise generation systems are used, then noise can be added to data, but system complexity and integration requirements increase
Solution Approach 1:
The noise generation unit is integrated directly into the memory controller, merging the noise generation functionality with the existing data read/write pathway. This integration eliminates the need for separate external noise generation systems and complex inter-system connections, reducing integration complexity while maintaining noise injection capability.
Solution Approach 2:
The memory device performs noise injection on its own data output without requiring external assistance. The combination unit within the memory controller directly combines the generated noise with the read data before output, enabling the system to serve itself and eliminate dependencies on external noise generation equipment.
Data Source
AI summary
Noise injection procedures implemented on the die of a non-volatile memory (NVM) array are disclosed. In one example, noise is injected into data by adjusting read voltages to induce bit flips while using feedback to achieve a target amount of information degradation. In another example, random data is iteratively combined with itself to achieve a target percentage of random 1s or 0s, then the random data is combined with data read from the NVM array. In other examples, pixels are randomly zeroed out to emulate dead charge coupled device (CCD) pixels. In still other examples, the timing, voltage, and/or current values used within circuits while transferring data to/from latches or bitlines are adjusted outside their specified margins to induce bit flips to inject noise into the data. The noise-injected data may be used, for example, for dataset augmentation or for the testing of deep neural networks (DNNs).