Non-Volatile Memory Controller Parallel Data Programming
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Solution Overview
Problem
In multi-level cell (MLC) non-volatile memory devices, programming upper data pages is slower and more error-prone due to finer voltage range differentiation, leading to performance degradation and the need for controllers to wait for complete programming before starting others, especially during long upper data page programming.
Innovation Solution
A method where data is temporarily stored in a 'fast' storage area and then programmed to a 'slow' storage area using a single write command, allowing simultaneous reception of new data while programming the previously stored data to the slow area, optimizing system performance by avoiding partial programming and leveraging faster data transfer times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is programmed to upper data pages in MLC memory, then storage capacity is improved, but programming speed and reliability deteriorate due to finer voltage range differentiation
Solution Approach 1:
The patent segments the data programming process into two distinct phases: first programming data to a temporary fast storage area, then programming that data to the slow upper data page storage area. This segmentation allows the controller to perform operations in parallel - receiving new data while simultaneously programming previous data to the slow storage area, thereby resolving the contradiction between storage capacity and programming speed.
Solution Approach 2:
The patent applies preliminary action by first storing data in a fast storage area before programming it to the slow upper data page. This preliminary storage in the fast area allows the controller to prepare data and then transfer it to the slow storage area without waiting for the entire programming sequence to complete, improving overall programming throughput while maintaining the ability to store multiple bits per cell.
2Reliability
If the controller waits for complete programming of one page before starting another, then programming accuracy is maintained, but time loss increases significantly
Solution Approach 1:
The patent enables continuous useful action by allowing the controller to receive new data and program it to the fast storage area while simultaneously programming previous data to the slow upper data page. This overlapping of operations eliminates idle wait time and maintains continuous productive activity, resolving the contradiction between programming accuracy and time loss.
Solution Approach 2:
By preliminarily storing data in the fast storage area before programming to the slow area, the controller can initiate the slow programming operation early and use the waiting time productively to receive and prepare new data. This preliminary action eliminates the sequential wait time and allows continuous operation while maintaining programming accuracy through proper sequencing.
3Productivity
If partial programming of upper data pages is allowed, then productivity is improved, but data integrity and reliability deteriorate
Solution Approach 1:
The patent segments the storage area into a fast storage area and a slow upper data page storage area, allowing partial programming operations in the fast area while completing programming in the slow area. This segmentation enables the controller to perform partial programming operations without compromising data integrity, as the fast area serves as a temporary buffer that ensures complete data transfer before final programming.
Solution Approach 2:
The fast storage area acts as an intermediary between the controller and the slow upper data page storage area. This intermediary allows the controller to receive and prepare data independently, then transfer it to the slow storage area in a controlled manner, enabling partial programming operations while maintaining data integrity through the buffering mechanism.
Data Source
AI summary
A method of storing data onto a non-volatile memory includes receiving, from a host, first data that is originally assigned to a first storage area, programming the first data to a second storage area, receiving second data from the host, and while receiving the second data from the host, programming, to the first storage area, the first data that has been programmed to the second storage area, wherein the second data is received from the host simultaneously with the first data being programmed to the first storage area. The second storage area is capable of having data stored thereon faster than the first storage area.