Non-Volatile Memory Power Management for SSD Data Integrity

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Solution Overview

Problem

Solid state drives (SSDs) face challenges in handling power failures, where in-flight data is not immediately written to non-volatile memory, leading to potential data loss due to the time required to fully charge capacitors for backup power, restricting the use of non-volatile memory during the power-up process.

Innovation Solution

Implementing a power management module that allows non-volatile memory to be used earlier by charging capacitors in phases, enabling read operations at a lower charge level and write operations at a higher level, with a power loss handler operating in limited or comprehensive modes to manage in-flight data during power failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the capacitor is fully charged before enabling non-volatile memory operations, then data integrity during power failure is ensured, but the time required for memory initialization and operational readiness increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory initialization time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the capacitor charging process into multiple phases with different charge level thresholds. Read operations are enabled at a first charge level threshold, while write operations are enabled at a second, higher charge level threshold. This segmentation allows the system to provide different levels of data protection based on the operation type, reducing overall initialization time while maintaining data integrity for critical write operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by enabling read operations before the capacitor is fully charged, accepting a lower level of protection for reads compared to writes. This partial enabling of functionality reduces the time loss without completely compromising system reliability, as write operations still require full charging for complete data integrity protection.

Inventive Principle:
Principle #16Partial or excessive action

2Productivity

If the capacitor charge level is monitored continuously to enable operations, then operational readiness is improved, but the system complexity increases

Engineering Contradiction:
Improveoperational readinessVSAvoidcharge monitoring system
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements feedback mechanisms where the power management module continuously monitors the capacitor charge level and compares it against predefined thresholds. Based on the monitored charge level, the system dynamically enables or disables read and write operations to the non-volatile memory. This feedback-based approach automates the decision-making process, improving operational readiness without requiring complex manual intervention.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the operational parameters of the non-volatile memory based on the capacitor charge level. At different charge thresholds, different operation types are permitted, effectively using parameter changes to manage system complexity. The system transitions between different operational states (read-only, read-write, or disabled) based on the charge parameter, simplifying the control logic compared to continuous complex monitoring.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If write operations are restricted until higher charge levels are reached, then data integrity during power failure is improved, but the productivity of the memory system decreases

Engineering Contradiction:
Improvewrite operation integrityVSAvoidmemory throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments write operations into different phases based on charge level thresholds. Critical write operations that require data integrity protection are restricted until higher charge levels are achieved, while less critical operations may be permitted earlier. This segmentation allows the system to prioritize data integrity for important writes while maintaining some productivity through staged operation enabling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control of write operations based on real-time capacitor charge levels. As the charge level increases, more write operation types become enabled. This dynamic approach allows the system to adapt its productivity level to the available power protection, maximizing throughput when charge is sufficient while maintaining integrity when charge is low.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables earlier functionality of non-volatile memory for read and write operations, reducing the time required for capacitor charging and ensuring data integrity by allowing in-flight data to be written during power failures, thus improving power loss handling efficiency.

Implementation Method 1

charging capacitors in phases, enabling read operations at a lower charge level and write operations at a higher level

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

determining that a power loss has occurred, where the power loss includes a loss of power to the non-volatile memory

Methodology Applied
Scientific EffectElectrical field detection: Electric Field

Data Source

PatentEP3563214B1Enabling functions of a memory device in a plurality of phases
Publication Date: 2022.02.09 INTEL CORP
  • EP3563214B1 patent drawingFigure 1
  • EP3563214B1 patent drawingFigure 2
  • EP3563214B1 patent drawingFigure 3

AI summary

Provided is a memory device, comprising a non-volatile memory, an energy store coupled to the non-volatile memory, and a power management module configurable to power up the non-volatile memory and provide read access to the non-volatile memory, in response to the energy store being charged to at least a first predetermined level. Provided also is a computational device that includes the memory device. Provided also is a method in which an energy store coupled to a non-volatile memory of a memory device is charged to at least a first predetermined level. The non-volatile memory is powered up and read access is provided to the non-volatile memory, in response to charging the energy store to at least the first predetermined level.