Non-Volatile Memory Cell Pre-Pulse Operation for Transient Current Control

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Solution Overview

Problem

Non-volatile memory (NVM) devices, particularly charge trap flash memory devices, face limitations in bit density and operational stability due to transient currents caused by electron trapping in channel layers, leading to inconsistent memory states during read operations.

Innovation Solution

Applying pre-pulses before programming, erasing, and reading operations to moderate transient current disturbances by adjusting voltages and conductivities, ensuring that memory states determined by read operations align with those identified by verification operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level cells or triple-level cells are used to increase bit density, then storage capacity is improved, but transient current occurs during read operation due to electron trapping in channel layers

Engineering Contradiction:

Improvebit densityVSAvoidmemory state consistency

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

A pre-pulse is applied before the read pulse to clear trapped electrons from the channel layer before the actual read operation. This preliminary action prevents transient current disturbances that would otherwise cause inconsistent memory state detection, thereby maintaining reliability while using high-density MLC or TLC cells

Inventive Principle:

Principle #10Preliminary action

2Productivity

If verification operation is performed immediately after programming/erasing operation, then operational efficiency is improved, but transient current from trapped electrons causes sensing margin offset

Engineering Contradiction:

Improveoperational efficiencyVSAvoidsensing margin

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The pre-pulse is inserted between the programming/erasing pulse and the verification pulse to clear trapped electrons before verification. This maintains operational efficiency by keeping the verification immediate while eliminating the transient current that would otherwise cause sensing margin offset and measurement errors

Inventive Principle:

Principle #10Preliminary action

3Ease of manufacture

If channel layers with grain boundary traps are used in MLCs or TLCs, then manufacturing feasibility is improved, but electron trapping causes undesired transient current during read operation

Engineering Contradiction:

Improvemanufacturing feasibilityVSAvoidtransient current

Core Design Contradiction:

Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The pre-pulse technique converts the harmful effect of grain boundary traps (which naturally exist in manufactured channel layers) into a manageable condition. By applying the pre-pulse to clear trapped electrons, the natural manufacturing characteristics are preserved while the harmful transient current effect is eliminated before read operations

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9830992B1Operation method of non-volatile memory cell and applications thereof

Publication Date: 2017.11.28 MACRONIX INTERNATIONAL CO LTD

AI summary

An operation method of a memory cell includes steps of applying a pre pulse before a read pulse is applied, wherein the pre pulse is larger than a maximum threshold voltage or less than a lowest threshold voltage.