Digital Control for NVM Program Voltage Regulation
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Solution Overview
Problem
Non-volatile memory (NVM) systems face voltage drops due to IR losses in distribution lines, resulting in undesired program voltages being applied to NVM cells, especially in long arrays where current resistance drops significantly affect medium voltage signals.
Innovation Solution
A digital control system using a voltage control lookup table dynamically adjusts program voltages based on cell address locations and the number of cells to be programmed, generating digital control values that compensate for IR drops, ensuring desired voltage levels are achieved across the NVM cell array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If program voltage is distributed through long distribution lines to reach distant sectors, then more NVM cells can be programmed, but significant IR voltage drops occur causing insufficient voltage at the cells
Solution Approach 1:
The patent places multiple program voltage generation circuits at different locations within the NVM cell array, specifically at sector boundaries. Each local voltage generation circuit serves its adjacent sectors, providing program voltage locally without requiring long-distance distribution. This eliminates IR voltage drops in distribution lines while enabling coverage of large array areas.
Solution Approach 2:
The patent divides the NVM cell array into multiple sectors, with each sector served by its own local program voltage generation circuit. This segmentation allows independent voltage generation for each sector, ensuring that voltage levels remain accurate and stable regardless of the total array size. The segmentation principle resolves the contradiction by making the system scalable without compromising voltage precision.
2Use of energy by moving object
If medium voltage signals are used for programming, then power consumption is reduced, but the signals are more susceptible to IR drops in distribution lines
Solution Approach 1:
The patent introduces local program voltage generation circuits as intermediary elements between the power supply and the NVM cells. These intermediate circuits generate the required medium voltage locally, eliminating the need for long-distance voltage distribution. This intermediary approach maintains the power efficiency of medium voltage programming while ensuring reliable voltage delivery by removing the vulnerable distribution lines.
3Manufacturing precision
If higher voltage levels are applied to compensate for IR drops, then sufficient voltage reaches distant cells, but excessive stress is applied to NVM cells during programming
Solution Approach 1:
The patent implements preliminary voltage generation at local locations within the array, so that the correct voltage level is established before reaching the NVM cells. By generating the precise required voltage locally rather than distributing higher voltage from a distant source, the system ensures adequate voltage reaches the cells without applying excessive stress. The preliminary action of local voltage generation prevents the harmful effect of over-stressing cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively overcomes IR-induced voltage drops, ensuring that program voltages reach the desired levels, even in long NVM arrays, by dynamically adjusting output voltages through the program voltage generation circuitry, thereby maintaining the integrity of programming operations.
Implementation Method 1
program voltage generation circuitry 102 that generates and outputs program voltages to be applied to the NVM cells
Implementation Method 2
A distribution line 110 feeds the MV output signal (VPRG) to the source gate drivers
Implementation Method 3
Each SGTFS NVM cell includes a control gate, a select gate, a source, and a drain
Data Source
AI summary
Methods and systems are disclosed for digital control for regulation of program voltages for non-volatile memory (NVM) systems. The disclosed embodiments dynamically adjust program voltages based upon parameters associated with the cells to be programmed in order to account for IR (current-resistance) voltage drops that occur within program voltage distribution lines. Other voltage variations can also be accounted for with these dynamic adjustments, as well. The parameters for cells to be programmed can include, for example, cell address locations for the cells to be programmed, the number of cells to be programmed, and/or other desired parameters associated with the cells to be programmed. The disclosed embodiments use digital control values obtained from lookup tables based upon the cell parameters to adjust output voltages generated by voltage generation circuit blocks used to program the selected cells thereby tuning the program output voltage level to a predetermined desired level.