Early Programming Failure Detection in Non-Volatile Memory
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Solution Overview
Problem
As memory cells decrease in size and memory arrays increase in density, maintaining data integrity becomes challenging due to issues such as programming failure, word line failure, and block failure in non-volatile memory systems.
Innovation Solution
The implementation of early detection methods for programming failure, word line failure, and block failure based on detecting deviations in program completion loops for non-volatile memory, utilizing techniques like absolute and differential program loop count tests to identify and address these failures efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are scaled down to increase density, then storage capacity increases, but programming failure and data integrity issues worsen
Solution Approach 1:
The patent applies preliminary action by performing verification operations during the programming process itself, rather than after completion. The system executes verify operations at intermediate stages of programming to detect failures early, allowing corrective actions to be taken before the programming process completes, thus preventing propagation of errors in high-density memory cells
Solution Approach 2:
The patent implements feedback mechanisms by continuously monitoring programming status and verification results during the programming process. The system uses feedback from verify operations to adjust programming parameters and detect failures in real-time, enabling dynamic correction of programming issues that arise due to scaling effects in high-density memory
2Reliability
If traditional verification methods are used, then programming completion is confirmed, but failure detection is delayed until the end of programming
Solution Approach 1:
The patent performs verification operations at intermediate stages during programming rather than waiting for completion. This preliminary verification detects programming failures early in the process, allowing immediate corrective actions without waiting for the full programming cycle to complete, thus reducing effective programming time while maintaining reliability
Solution Approach 2:
The patent enables skipping of remaining programming steps when failures are detected early through intermediate verification. Instead of completing unnecessary programming cycles for already-failed memory cells, the system rushes through detection and halts further processing, saving time and resources while maintaining accurate failure detection
Data Source
AI summary
An apparatus is provided that includes a block including a word line coupled to a plurality of memory cells, and a control circuit coupled to the word line. The control circuit is configured to program the plurality of memory cells by applying program pulses to the word line in a plurality of program loops, determining a first count of a number of the program loops used to complete programming a first subset of the plurality of memory cells to a first programmed state, first comparing the first count to a corresponding first lower limit and a corresponding first upper limit, and determining whether programming the plurality of memory cells has failed based on a result of the first comparing step.


