Non-volatile Memory Programming Suspension for Data Retention

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Solution Overview

Problem

Non-volatile memory experiences short-term data retention issues due to insecure charge loss from shallow energy level traps, leading to threshold voltage shifts and data errors.

Innovation Solution

A gate-to-channel voltage differential is created between programming and verifying phases to accelerate electron migration out of shallow traps, with a higher voltage at the channel compared to the gate, applied only during specific time periods between programming signal doses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a suspension period is inserted during programming to allow charge stabilization, then data retention reliability is improved, but programming time increases

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies periodic action by implementing suspension periods at specific intervals during the programming process. Rather than continuous programming, the method periodically pauses to allow charge stabilization, then resumes programming. This periodic interruption pattern addresses the threshold voltage shift issue while managing the overall programming time through strategic timing of these suspension periods.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent employs preliminary action by inserting suspension periods before verification steps and at strategically determined points during programming. This preliminary stabilization action ensures that charge distribution is settled before reading or verifying data, preventing errors due to transient threshold voltage shifts while maintaining efficient programming throughput.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If programming is performed continuously without suspension, then programming speed is maintained, but threshold voltage shifts cause data errors

Engineering Contradiction:
Improveprogramming speedVSAvoiddata accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent resolves this contradiction by implementing periodic suspension periods during programming rather than continuous operation. These suspensions are strategically placed to allow charge stabilization without significantly impacting overall programming speed. The method balances productivity and reliability by resuming programming after each suspension, maintaining throughput while ensuring data accuracy through periodic stabilization pauses.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent maintains continuity of useful action by minimizing the duration and frequency of suspension periods. Rather than long interruptions, the method uses brief, strategically timed suspensions that allow just enough time for charge stabilization. Programming resumes quickly after each suspension, ensuring that the overall programming process remains efficient while still achieving the necessary charge stabilization for accurate data storage.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively mitigates short-term data retention issues without significantly increasing programming time, ensuring reliable data storage and retrieval.

Implementation Method 1

A gate to channel voltage differential is created for non-volatile memory cells between programming and verifying in order to accelerate the effects of the short term data retention issue. That is, the gate to channel voltage differential will accelerate the migrating of electrons out of shallow traps.

Methodology Applied
Scientific EffectElectron migration: Electron Beam

Data Source

PatentUS12100461B2Non-volatile memory with suspension period during programming
Publication Date: 2024.09.24 SANDISK TECHNOLOGIES LLC
  • US12100461B2 patent drawing
  • US12100461B2 patent drawing
  • US12100461B2 patent drawing

AI summary

To remedy short term data retention issues, a system creates a gate to channel voltage differential for non-volatile memory cells between programming and verifying in order to accelerate the effects of the short term data retention issue. That is, the gate to channel voltage differential will accelerate the migrating of electrons out of shallow traps. In some embodiments, the gate to channel voltage differential comprises a higher voltage at the channel in comparison to the gate. In some embodiments, the programming comprises applying doses of a programming signal and the gate to channel voltage differential is only created for a subset of the time periods between doses of the programming signal.