Non-Volatile Memory Cells for Physically Unclonable Function Generation

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Solution Overview

Problem

Conventional PUF implementations require dedicated hardware, leading to wasted area on chips that do not need a PUF, and existing solutions face high error probabilities in key recovery due to environmental variations.

Innovation Solution

An electronic device utilizing non-volatile memory with a memory controller and evaluator to generate a PUF response by applying control signals to memory cells, causing them to maintain different states based on physical properties, and using sense amplifiers to read out these states, thereby reducing the need for specialized hardware and minimizing error probabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated PUF hardware is implemented on every chip, then low bit error probabilities are achieved, but chip area is wasted on chips that do not need a PUF

Engineering Contradiction:
Improvebit error probabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies universality by enabling general-purpose memory cells and sense amplifiers to serve dual functions: normal memory operation and PUF key generation. The memory controller selectively configures existing hardware components to operate in PUF mode, eliminating the need for dedicated PUF hardware while maintaining low bit error probabilities through controlled read operations and error correction mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If general purpose hardware is used for generating PUF response, then chip area is reduced, but error probability increases

Engineering Contradiction:
Improvechip areaVSAvoiderror probability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies parameter changes by carefully controlling read operation parameters (voltages, currents, timing) to optimize the extraction of physical variations from memory cells. The memory controller adjusts read conditions to enhance sensitivity to manufacturing variations while maintaining signal integrity, and employs error correction codes to compensate for increased error probability in general-purpose hardware.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If dedicated PUF hardware is implemented, then low error probability is achieved, but device complexity increases

Engineering Contradiction:
Improveerror probabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent reduces device complexity by making existing memory components multi-functional. The same memory cells and sense amplifiers used for data storage are configured to generate PUF responses, eliminating the need for separate dedicated PUF hardware circuits. The memory controller manages both memory operations and PUF key generation through unified control logic.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9093128B2Electronic device with a plurality of memory cells and with physically unclonable function
Publication Date: 2015.07.28 INFINEON TECHNOLOGIES AG
  • US9093128B2 patent drawing
  • US9093128B2 patent drawing
  • US9093128B2 patent drawing

AI summary

An electronic device includes a non-volatile memory having a plurality of memory cells, a memory controller, and an evaluator. The memory controller is configured to provide control signals to the non-volatile memory causing the non-volatile memory, or a selected memory section of the non-volatile memory, to be in one of a read state and a weak erase state, wherein the weak erase state causes the plurality of memory cells to maintain different states depending on different physical properties of the plurality of memory cells. The evaluator is configured to read out the plurality of memory cells and to provide a readout pattern during the read state, wherein the readout pattern that is provided after a preceding weak erase state corresponds to a physically unclonable function (PUF) response of the electronic device uniquely identifying the electronic device.