Non-volatile Memory Programming with Ramp Voltage Verify

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Solution Overview

Problem

Conventional programming operations in non-volatile memory devices face challenges in determining the states of memory cells, leading to inefficiencies in achieving target programmed states, particularly in multi-level cell memory devices where precise threshold voltage control is required.

Innovation Solution

A method and apparatus for programming non-volatile memory devices that utilize a verify operation with a ramp voltage signal to determine whether selected memory cells have reached their target threshold voltage values, adjusting the programming rate based on the verify results to ensure accurate programming and prevent over-programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional programming operations are used to program memory cells, then the memory cells can be programmed to target states, but the programming process is slow and inefficient due to difficulty in determining memory cell states

Engineering Contradiction:
Improveprogramming speedVSAvoidmemory cell state determination accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing a verify operation before completing the programming operation. The verify operation uses a ramp voltage signal to preliminarily check whether memory cells have reached their target threshold voltage, allowing the system to adjust programming parameters in advance and avoid unnecessary programming cycles, thereby improving programming speed while maintaining accuracy

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using verify operation results to dynamically adjust programming parameters. The system continuously monitors memory cell states during programming through verify operations and adjusts programming voltage and timing based on whether cells have reached target states, preventing both under-programming and over-programming while optimizing programming speed

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If the programming operation repeats multiple times to achieve target programmed states, then the programming accuracy improves, but the programming time increases significantly

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The verify operation serves as a preliminary check that prevents unnecessary programming repetitions. By checking memory cell states before completing programming and adjusting subsequent programming cycles based on verify results, the system achieves target accuracy with fewer iterations, reducing total programming time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The feedback mechanism uses verify operation outcomes to control the programming process dynamically. When verify indicates cells have reached target states, programming stops; when not reached, programming continues with adjusted parameters. This closed-loop control eliminates wasteful repeated programming while ensuring accuracy

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP2689424B1Non-volatile memory programming
Publication Date: 2021.09.08 MICRON TECHNOLOGY INC
  • EP2689424B1 patent drawingFigure 1
  • EP2689424B1 patent drawingFigure 2
  • EP2689424B1 patent drawingFigure 3

AI summary

Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying a signal to a line associated with a memory cell, the signal being generated based on digital information. The method can also include, while the signal is applied to the line, determining whether a state of the memory cell is near a target state when the digital information has a first value, and determining whether the state of the memory cell has reached the target state when the digital information has a second value. Other embodiments including additional memory devices and methods are described.