Non-Volatile Memory Read Disturbance Management via Data Relocation

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Solution Overview

Problem

Non-volatile memory devices, particularly flash memory devices, suffer from read disturbance, where frequent read operations can lead to data accuracy issues due to electron migration affecting adjacent memory cells, necessitating a method to manage and mitigate this phenomenon.

Innovation Solution

A method that involves tracking read counts and error bits in memory sections or blocks, relocating data when read counts exceed a threshold and error bits surpass a certain margin, thereby reducing the likelihood of data corruption and maintaining data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If read operations are performed frequently on flash memory devices, then data access speed is improved, but read disturbance occurs causing data accuracy degradation

Engineering Contradiction:
Improvedata access speedVSAvoiddata accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs preliminary actions by monitoring read counts and detecting error bits before data corruption becomes severe. When the read count exceeds a threshold or error bits are detected, the system proactively relocates data to a different physical location, preventing further read disturbance accumulation and maintaining data accuracy before unrepairable errors occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism (error detection and data relocation system) between the read operation and the stored data. This intermediary monitors read counts, detects error bits through scanning, and relocates data when necessary, thereby mediating between the need for frequent reads and the prevention of read disturbance-induced data corruption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If data is relocated frequently to prevent read disturbance, then data accuracy is maintained, but device complexity and operation overhead increase

Engineering Contradiction:
Improvedata accuracyVSAvoidoperation overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by implementing selective data relocation based on specific conditions (read count threshold or error bit detection) rather than uniform relocation of all data. Only the affected memory sections undergo relocation, while other sections continue normal operation, thereby reducing overall system complexity and operation overhead.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes parameter changes by monitoring read count thresholds and error bit counts as triggering conditions for data relocation. By changing the operational state based on these parameters, the system dynamically adjusts when relocation occurs, balancing data accuracy maintenance with operational efficiency and reduced complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9361182B2Method for read disturbance management in non-volatile memory devices
Publication Date: 2016.06.07 TRANSCEND INFORMATION
  • US9361182B2 patent drawing
  • US9361182B2 patent drawing

AI summary

When performing a read operation on a non-volatile memory device which includes a plurality of memory sections each corresponding to a plurality of data units, the read count of a specific memory section and the error bits of its corresponding data units are monitored for determining whether data relocation should be perform. When the read count of the specific section exceeds a read count threshold and the error bits of any corresponding data unit exceeds an error threshold, data is moved from the specific memory section to another memory section of the non-volatile memory device, thereby preventing read disturbance from occurring in the specific memory sections.