Non-Volatile Memory Read Endurance via Partially Programmed Block Management

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Solution Overview

Problem

Non-volatile memory devices, such as NAND flash memory, face issues with read disturb stress (RDS) and inter-cell interference (ICI) that lead to increased raw bit error rates (RBER), causing incorrect data reads and misplacement failures, especially in partially programmed blocks.

Innovation Solution

Implementing a method that uses two thresholds to determine when a block of non-volatile memory has reached a fully programmed state, stopping further writes and relocating data when necessary to mitigate RDS effects, and applying different voltage levels to programmed and erased pages to reduce interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If flash memory is read repeatedly, then data can be accessed frequently, but read disturb stress causes threshold voltage shifts and increases raw bit error rate

Engineering Contradiction:

Improveread access frequencyVSAvoidraw bit error rate

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing read-disturb mitigation operations before actual read operations can cause significant threshold voltage shifts. The system proactively identifies and compensates for RDS effects in partially programmed blocks, preventing error accumulation rather than reacting after errors occur.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms by monitoring read counts and threshold voltage distributions to dynamically adjust read operations. The system uses feedback from read disturb stress detection to modify subsequent read operations, applying compensatory voltage levels or skipping reads when error rates would exceed thresholds.

Inventive Principle:

Principle #23Feedback

2Measurement precision

If inter-cell interference is reduced by increasing spacing between cells, then read accuracy improves, but memory density decreases

Engineering Contradiction:

Improveread accuracyVSAvoidmemory density

Core Design Contradiction:

Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting read voltage levels based on the programming state of neighboring cells. Instead of physically spacing cells further apart, the system modifies electrical parameters (voltage levels, timing) during read operations to compensate for capacitive coupling effects, thereby maintaining read accuracy without sacrificing memory density.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If partially programmed blocks are read, then data access flexibility is maintained, but read disturb stress effects are amplified due to mixed programmed and erased cells

Engineering Contradiction:

Improvedata access flexibilityVSAvoidread disturb stress

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies segmentation by dividing the memory array into distinct regions based on programming state - fully programmed blocks, partially programmed blocks, and erased blocks. Each segment is managed with different read strategies, allowing flexible access to available data while applying enhanced protection measures specifically to vulnerable partially programmed regions where RDS effects are amplified.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves read endurance and reduces RBER by preventing RDS-induced failures and ICI, allowing for more reliable data storage and retrieval.

Implementation Method 1

Programming of a cell in a flash memory (e.g., NAND flash memory) is attained by Fowler-Nordhiem tunneling to reach an ideal programmed voltage.

Methodology Applied

Scientific EffectFowler-Nordheim tunneling:

Implementation Method 2

level distributions broaden due to capacitive coupling between neighboring cells. This phenomenon is called inter-cell-interference (ICI) caused by floating-gate to floating-gate coupling.

Methodology Applied

Scientific EffectCapacitive coupling: Capacitance

Implementation Method 3

As flash memories (e.g., NAND flash memory) are read repeatedly, the threshold voltages of the ceils in the flash memories get disturbed. This disturbance caused by the read operation is also referred to as 'read disturb stress' (RDS).

Methodology Applied

Scientific EffectRead disturb stress:

Data Source

PatentUS8954650B2Apparatus, system, and method for improving read endurance for a non-volatile memory

Publication Date: 2015.02.10 SK HYNIX NAND PRODUCT SOLUTIONS CORP

AI summary

Described are an apparatus, system, and method for improving read endurance for a non-volatile memory (NVM). The method comprises: determining a read count corresponding to a block of NVM; identifying whether the block of NVM is a partially programmed block (PPB); comparing the read count with a first threshold when it is identified that the block is a PPB; and when identified otherwise, comparing the read count with a second threshold, wherein the first threshold is smaller than the second threshold. The method further comprises: identifying a block that is a PPB; determining a first word line corresponding to un-programmed page of the PPB; and sending the first word line to the NVM, wherein the NVM to apply: a first read voltage level to word lines corresponding to the un-programmed pages of the PPB, and a second read voltage level to word lines corresponding to programmed pages of the PPB.