Non-Volatile Memory Block Read Testing for Disturbance Detection

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Solution Overview

Problem

Non-volatile memory devices, such as NAND flash, face challenges in distinguishing between endurance failures and disturbance failures, leading to premature removal of healthy blocks from storage devices, which reduces storage capacity and efficiency.

Innovation Solution

Implementing a read test to assess the pass/fail status of memory blocks by programming a known pattern and verifying it after a period, allowing for differentiation between endurance failures and disturbance-induced errors, thereby maintaining storage capacity and extending the operational life of memory blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional pass/fail testing is used to assess data retention capabilities, then reliability of data storage is improved, but storage capacity is reduced due to premature removal of healthy blocks

Engineering Contradiction:
Improvedata retention capabilityVSAvoidstorage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the assessment process into distinct phases: initial pass/fail testing for reliability assessment, and ongoing read-only tests for disturbance detection. This segmentation allows different testing strategies to be applied at different stages, preventing premature block removal while maintaining reliability monitoring.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary comprehensive pass/fail testing during manufacturing and initial operation to establish baseline reliability. Subsequently, it transitions to less intrusive read-only tests that monitor for disturbance errors without triggering premature block removal, thereby preserving storage capacity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If repeated pass/fail tests are performed to monitor endurance, then data retention reliability is improved, but operational time is reduced due to block removal

Engineering Contradiction:
Improvedata retention capabilityVSAvoidoperational life of memory block
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent implements periodic monitoring through read-only tests that check for disturbance errors without performing full pass/fail sequences. This periodic, less intrusive monitoring maintains reliability awareness while reducing the frequency of aggressive testing that would accelerate block degradation and removal.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system uses the memory blocks themselves to perform self-diagnostics through read operations that detect disturbance errors. This self-service approach allows continuous monitoring of block health without requiring external stress tests that would reduce operational life.

Inventive Principle:
Principle #25Self-service

3Reliability

If conservative testing thresholds are used to ensure reliability, then data retention capability is improved, but storage efficiency is reduced

Engineering Contradiction:
Improvedata retention capabilityVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent dynamically adjusts testing strategies based on block history and error patterns. Blocks showing signs of disturbance errors are monitored more closely with read-only tests, while healthy blocks undergo less frequent testing. This dynamic approach maintains reliability for at-risk blocks while improving overall storage efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes testing parameters based on observed block behavior: transitioning from aggressive pass/fail sequences for healthy blocks to targeted read-only tests for blocks showing disturbance signs. This parameter adjustment maintains reliability monitoring while reducing the productivity penalty associated with conservative testing thresholds.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9305663B2Techniques for assessing pass/fail status of non-volatile memory
Publication Date: 2016.04.05 NETAPP INC
  • US9305663B2 patent drawing
  • US9305663B2 patent drawing
  • US9305663B2 patent drawing

AI summary

Examples are disclosed for assessing pass/fail status of non-volatile memory. In some examples, information may be received to indicate a block having memory pages associated with non-volatile memory cells. The information may indicate at least some of the memory pages have bit errors in excess of an error correction code (ECC) ability to correct. For these examples, the block may be selected for read testing. Read testing may include programming the memory pages with a known pattern and waiting a period of time. Following the period of time each memory page may be read and if a resulting pattern read matches the known pattern programmed to each memory page, the memory page passes. The block may be taken offline if the number of passing memory pages is below a pass threshold number. Other examples are described and claimed.