Non-Volatile Memory Section-Level Mapping for Damaged Block Recovery
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Solution Overview
Problem
Conventional non-volatile memory management systems mark entire blocks as unusable when a single damaged word line section is detected, leading to wasted storage capacity, and designing logical-to-physical mapping at a page level increases RAM requirements and costs.
Innovation Solution
A method and apparatus that utilize a damaged section table to identify and bypass damaged word line sections, allowing other undamaged sections within a block to be used for programming, thereby preventing the entire block from being marked as unusable, and using a logical-to-physical address mapping table for efficient random access to word line sections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If L2P mapping is designed at block level, then device complexity is reduced, but storage capacity is wasted due to entire block being marked unusable when a damaged section is detected
Solution Approach 1:
The patent segments the block-level L2P mapping into section-level mappings. Instead of treating the entire block as a single mapping unit, the system divides it into multiple sections (e.g., 32 or 64 WL sections per block), allowing individual sections to be independently mapped and managed. This enables the system to bypass damaged sections while utilizing healthy ones, thus resolving the contradiction between simplified block-level management and storage capacity waste.
2Loss of substance
If L2P mapping is designed at page level, then storage capacity utilization is improved by bypassing damaged sections, but RAM requirements and cost increase significantly
Solution Approach 1:
The patent introduces a hierarchical mapping structure that operates at an intermediate dimension between block and page levels. By implementing section-level L2P mapping (where a section comprises multiple WL sections), the system achieves fine-grained damage bypass capability without requiring full page-level mapping. This intermediate dimension reduces the number of mapping entries needed compared to page-level mapping, thereby reducing RAM requirements while still enabling selective bypass of damaged sections.
3Reliability
If a block contains damaged WL sections, then reliability is compromised, but marking the entire block as bad results in loss of storage capacity
Solution Approach 1:
The patent applies local quality by enabling different sections within the same block to have different statuses (healthy or damaged). Instead of treating the block as a uniform unit, the system identifies and marks only the specific damaged WL sections while allowing other healthy sections to remain usable. This localized approach to quality management ensures data integrity by isolating damaged areas while maximizing storage capacity utilization through selective bypass.
Data Source
AI summary
A method for programming a non-volatile memory including a plurality of blocks, each block including a plurality of sections, each section including at least one page, and each page including a plurality of memory cells. The method includes checking a current section of the plurality of sections against a damaged section table to determine whether the current section is damaged. The damaged section table records information about whether a section in the memory is good or damaged. The method further includes using the current section for programming if the current section is not damaged.


