Non-Volatile Memory Sense Window Maintenance via Iterative Verification
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Solution Overview
Problem
Non-volatile memory cells experience a reduction in the sense window width due to increased cell current distribution in the erase state, leading to data read failures as the number of program-erase cycles increases, caused by trapped electrons and charge accumulation, resulting in a decrease in the ability to distinguish between program and erase states effectively.
Innovation Solution
Implementing a program loop counter and an erase loop counter in a state machine to manage the electric current of non-volatile memory cells, ensuring that programmed cells maintain a current higher than the program threshold and erased cells maintain a current lower than the erase threshold through iterative programming and erasing operations, using a verification algorithm to prevent over-programming and under-erasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional programming operations are performed without iterative verification, then programming speed is improved, but data read failures increase due to charge accumulation and trapped electrons
Solution Approach 1:
The patent implements iterative verification where the sense amplifier reads the memory cell state after each programming step and feeds this information back to the control circuit. This feedback loop allows the system to adjust subsequent programming operations based on actual cell state, preventing charge accumulation that would otherwise lead to data read failures while maintaining efficient programming speed.
Solution Approach 2:
The patent performs preliminary programming operations followed by verification reads before finalizing the programming state. This preliminary action with verification ensures that the memory cell reaches the desired state without excessive charge accumulation, preventing trapped electrons from causing subsequent data read failures while maintaining programming efficiency.
2Measurement precision
If the sense window width is maintained stable, then data read accuracy is improved, but programming complexity increases due to iterative verification operations
Solution Approach 1:
The control circuit uses feedback from the sense amplifier to dynamically adjust programming pulse width and amplitude. This feedback mechanism maintains stable sense window width by compensating for charge accumulation effects, ensuring accurate data reading while managing the complexity through intelligent control rather than simple iterative operations.
Solution Approach 2:
The patent dynamically changes programming parameters (pulse width, amplitude) based on verification results. By adjusting these parameters in response to measured cell state, the system maintains a stable sense window width and improves data read accuracy without requiring overly complex fixed-programming sequences.
3Reliability
If charge accumulation is prevented, then data read failures are reduced, but programming time increases due to iterative erase-program cycles
Solution Approach 1:
The patent employs periodic verification cycles interspersed with programming operations. Rather than continuous programming without breaks, the system performs programming steps followed by verification reads, then adjusts subsequent programming based on verification results. This periodic verification prevents charge accumulation and trapped electrons from causing data read failures while managing programming time through efficient cycle design.
Solution Approach 2:
The feedback mechanism allows the system to stop programming early once the desired state is achieved, avoiding unnecessary iterative cycles. By continuously monitoring cell state and adjusting programming operations accordingly, the system prevents charge accumulation issues without wasting time on redundant programming steps, thus improving reliability without excessive time loss.
Data Source
AI summary
A method of a state machine executing instructions related to program-erase operations performed on a non-volatile memory is disclosed. The method includes implementing a program-erase loop counter in the state machine, and presetting a threshold for an electric current of memory cells and a step time for each of the program and the erase operation. Based on repeatedly executing a number of comparison and verification operations, each for a duration of the preset step time until the program-erase loop counter reaches a maximum value thereof, the electric current of the each programmed-erased memory cell is maintained at a desired level thereof following termination of the each of the program and the erase operation.


