Non-Volatile Memory Sensing with Different Reference Potentials
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Solution Overview
Problem
Coarse/fine programming in non-volatile memory devices faces challenges in accurately sensing threshold voltage during verification, particularly due to large sub-threshold swing factors in smaller memory cells, which can lead to inaccurate sensing at fine verify levels without pre-charging the bit line between different sensings.
Innovation Solution
The implementation of different reference potentials during coarse and final verify levels compensates for bit line discharge during coarse level sensing, ensuring accurate sensing by adjusting the reference potentials to account for sub-threshold swing factors, thereby improving the accuracy of threshold voltage sensing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pre-charging the bit line is performed between coarse and fine sensing to compensate for discharge, then sensing accuracy is improved, but programming time increases
Solution Approach 1:
The bit line is pre-charged to a first reference potential before coarse sensing, and then pre-charged again to a second reference potential before fine sensing. This preliminary action compensates for the discharge that occurs during coarse sensing, ensuring accurate fine sensing without requiring excessive wait time.
Solution Approach 2:
The reference potential of the bit line is changed between coarse and fine sensing operations. The bit line is charged to a first reference potential for coarse sensing and then to a second reference potential for fine sensing. This parameter change optimizes the sensing accuracy for each stage while minimizing the time penalty.
2Measurement precision
If different reference potentials are used for coarse and fine sensing, then sensing accuracy is improved, but device complexity increases
Solution Approach 1:
The bit line serves multiple functions: it acts as the sensing line for both coarse and fine verification, and it provides the reference potential for comparison during both sensing operations. This multi-functionality reduces the need for separate dedicated circuits, thereby limiting the increase in device complexity.
Solution Approach 2:
The sensing circuit compares the bit line voltage to reference potentials that are equipotential with the expected threshold voltage levels. By using reference potentials that match the anticipated voltage ranges for erased and programmed states, the sensing operation is simplified while maintaining high accuracy.
3Productivity
If coarse verification is performed first to identify cells needing fine programming, then programming efficiency is improved, but measurement precision requirements increase
Solution Approach 1:
The verification process is segmented into two distinct stages: coarse verification and fine verification. Coarse verification uses a first verify level to quickly identify cells that need programming, while fine verification uses a second verify level to precisely determine the final programming state. This segmentation allows each stage to be optimized for its specific purpose.
Solution Approach 2:
Coarse verification performs a partial verification at a relaxed threshold to quickly eliminate cells that are clearly programmed or erased. This partial action reduces the burden on fine verification, which then only needs to precisely verify the remaining cells, thereby reducing the overall measurement precision requirements while maintaining programming efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of threshold voltage sensing in non-volatile memory devices, reducing errors associated with sub-threshold swing factors and maintaining efficient programming times.
Implementation Method 1
large sub-threshold swing factors in smaller memory cells, which can lead to inaccurate sensing at fine verify levels without pre-charging the bit line between different sensings
Data Source
AI summary
Coarse/fine programming of non-volatile memory is provided in which memory cells are programmed at a first rate of programming prior to reaching a coarse verify level for their intended state and a second rate of programming after reaching the coarse verify level but before reaching the final verify level for their intended state. Large sub-threshold swing factors associated with smaller memory cells can affect the accuracy of sense operations, particularly when sensing at a fine verify level after sensing at a coarse verify level without pre-charging the bit line between the different sensings. Different reference potentials are utilized when sensing at a coarse verify level and a final verify level. The different between the reference potentials can compensate for any discharge of the bit line during the coarse level sensing.


