Non-volatile Memory Serial Interface Execute in Place
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Solution Overview
Problem
Non-volatile memory devices with serial interfaces lack the capability for execute in place operations due to their serial nature, which restricts their ability to handle multiplexed data, address, and command signals efficiently, limiting their speed and functionality compared to parallel devices.
Innovation Solution
A non-volatile memory device with an interface circuit that receives multiplexed serial signals, utilizing an input buffer to reconstitute address, data, and command signals, and a state machine to control an array of memory cells, enabling execute in place operations through efficient signal processing and command execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a serial interface is used to minimize pins and operate at high speed, then the number of pins is reduced and operating speed increases, but the capability for execute in place operations is lost
Solution Approach 1:
The serial interface signals are segmented into separate command, address, and data components within the device. The input buffer divides the multiplexed serial stream into distinct signal types, allowing parallel processing paths for commands (to command circuit), addresses (to address circuit), and data (to data buffer circuit), enabling execute in place operations while maintaining serial pin efficiency
Solution Approach 2:
The patent transitions from a single-dimensional serial signal stream to a multi-dimensional signal structure by using the input buffer to simultaneously extract and route different signal types (command, address, data) to different functional circuits, creating parallel processing dimensions from a serial input
2Device complexity
If a single serial line is used to provide data, address, and commands, then pin count is minimized, but signal processing efficiency and speed are reduced
Solution Approach 1:
The input buffer performs preliminary action by pre-processing the incoming serial signals, separating and storing command, address, and data components before they are needed by respective circuits. This advance organization eliminates processing delays and enables faster execution of commands that require both address and data
Solution Approach 2:
The input buffer acts as an intermediary between the serial interface and the internal circuits. It receives the multiplexed serial stream, decomposes it into separate signal types, and provides them to the appropriate circuits (command circuit, address circuit, data buffer circuit), enabling efficient signal processing while maintaining serial interface simplicity
3Adaptability or versatility
If parallel lines are used to provide data and address, then execute in place operation is enabled, but the number of pins increases
Solution Approach 1:
The serial interface pins serve multiple functions by time-multiplexing command, address, and data signals on the same physical lines. The input buffer enables these universal pins to be interpreted differently based on timing and protocol, allowing execute in place capability with minimal pins
Data Source
AI summary
A non-volatile memory device comprises an interface circuit for receiving a plurality of signals. The plurality of signals provides multiplexed address and data and command signals in a serial format. An input buffer stores a plurality of the plurality of signals received in serial format and reconstitutes the address, data and command signals, and has an output. A command circuit receives the output of the input buffer and stores the command signals therefrom. An address circuit receives the output of the input buffer and stores the address signals therefrom. A data buffer circuit receives the output of the input buffer and stores the data signals therefrom. An array of non-volatile memory cells stores data from and provides data to the data buffer in response to address signals from the address decoder. A state machine is connected to the command circuit and controls the array of non-volatile memory cells. An output buffer receives data from the data buffer circuit and provides data to the interface circuit.