Non-Volatile Memory Data Protection via Signal Delay
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Solution Overview
Problem
Non-volatile memory devices face data destruction during system shutdown due to sudden voltage drops, which can lead to unintended data writing and loss, as the power supply to memory chips decreases below a threshold voltage.
Innovation Solution
A non-volatile memory data protecting device and method that includes a power shutdown sensor and a signal delay unit, utilizing a delay circuit, buffer, or capacitor to delay the voltage drop on input/output lines until the voltage reaches a threshold, preventing data loss and system malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power is shut down in a system, then the power supply to memory chips decreases to save energy, but the voltage drop causes unintended data writing and data destruction in non-volatile memory
Solution Approach 1:
The patent applies preliminary action by detecting the power shutdown condition before it fully occurs and activating the delay circuit in advance. The power shutdown sensor detects the shutdown signal and triggers the delay circuit to maintain voltage levels on input/output lines before the voltage naturally drops, preventing unintended data writing during the transition period
Solution Approach 2:
The patent uses a delay circuit as an intermediary element between the power supply and the memory device input/output lines. This intermediary maintains the voltage level for a predetermined time period during power shutdown, acting as a buffer that prevents the direct voltage drop from causing harmful effects on the memory device
2Reliability
If the voltage of input/output lines is maintained at threshold level for appropriate time to store data in flash memory, then data can be stored, but the time available during abnormal power shutdown is insufficient
Solution Approach 1:
The delay circuit is activated in advance upon detection of power shutdown, creating a predetermined time period during which the voltage is maintained. This preliminary action extends the available time window for data storage operations beyond what would be naturally available during an abnormal power shutdown event
Solution Approach 2:
The patent implements beforehand cushioning by preparing the delay circuit to maintain voltage levels before the actual data storage operation needs to occur. This cushioning effect provides a time buffer that protects against the insufficient time available during abnormal power shutdown, ensuring data can be properly stored
3Ease of operation
If all signal lines are decreased to 0V during system shutdown, then the system can be reset, but data may be inadvertently written in address number 0 of all memory addresses
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different signal lines during system shutdown. While power lines are allowed to decrease to 0V for system reset, the input/output lines to the memory device are maintained at threshold voltage level through the delay circuit. This localized voltage maintenance prevents unintended data writing while still allowing the rest of the system to reset properly
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively protects data by maintaining voltage levels on memory input/output lines until they reach a safe threshold, preventing unintended data writing and ensuring data integrity during system shutdowns, while preventing system performance degradation.
Implementation Method 1
the signal delay unit includes at least one of a capacitor, a buffer, and a delay circuit to delay a drop in voltage of the input/output line
Data Source
AI summary
Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit to delay a drop in voltage of an input/output line, a power shutdown sensor to sense power shutdown of a system, and a controller to control the signal delay unit in response to whether the system is shut down.