Block-Dependent Voltage Adjustment for NVM Source Line Bounce

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Solution Overview

Problem

As non-volatile memory devices increase in density, voltage signals, particularly source line voltages, near IO pads in peripheral circuitry experience variations due to proximity, affecting memory cell operations and performance.

Innovation Solution

Implementing driver adjustment circuitry that adjusts word line and source line voltage levels based on the position of memory planes and blocks relative to IO pads, using incremental adjustments to compensate for these variations, thereby stabilizing voltage levels and improving operational efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If storage devices increase in density with peripheral circuitry underneath storage arrays, then storage capacity increases, but source line voltage variation increases for blocks near IO pads

Engineering Contradiction:
Improvestorage capacityVSAvoidsource line voltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by implementing position-dependent voltage adjustments. Different blocks receive different voltage compensation levels based on their proximity to IO pads. Blocks closer to IO pads receive larger voltage adjustments to compensate for the increased interference, while blocks farther away receive smaller or no adjustments. This localized approach maintains voltage stability without unnecessarily modifying the entire memory array.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the voltage parameter dynamically based on block position. The driver adjustment circuitry modifies word line and source line voltage levels according to the specific location of each block relative to IO pads. This parameter change compensates for the voltage variations caused by high-density configuration, ensuring reliable memory operations across all blocks.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If blocks are positioned closer to IO pads for high density, then device density increases, but voltage signal quality deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidvoltage signal interference
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by proactively compensating for voltage interference before memory operations occur. The driver adjustment circuitry pre-adjusts voltage levels for blocks near IO pads based on their known positions. This preemptive compensation counteracts the harmful voltage variations that would otherwise occur during read/write operations, ensuring signal integrity without requiring real-time intervention.

Inventive Principle:
Principle #9Preliminary anti-action

3Reliability

If driver adjustment circuitry is implemented for all blocks, then voltage stability improves, but device complexity increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the memory array into different regions based on proximity to IO pads. The driver adjustment circuitry selectively applies voltage compensation only to specific blocks that are closer to IO pads, rather than uniformly adjusting all blocks. This segmented approach reduces the complexity burden by focusing adjustments only where needed, maintaining voltage stability without requiring complex circuitry throughout the entire device.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11521675B1Block-dependent cell source bounce impact reduction in non-volatile memory
Publication Date: 2022.12.06 SANDISK TECHNOLOGIES LLC
  • US11521675B1 patent drawing
  • US11521675B1 patent drawing
  • US11521675B1 patent drawing

AI summary

A data storage system includes a storage medium coupled to a storage controller via an electrical interface connected to a plurality of input/output (IO) pads of the storage medium. The storage medium receives a read or write instruction from the storage controller via the IO pads, associates the read or write instruction with memory cells of a first block of a first plane of a plurality of planes of the storage medium, and adjusts a word line voltage level or a source line voltage level for the first block of the first plane based on (i) a position of the first plane with respect to the IO pads of the storage medium and (ii) a position of the first block within the first plane.