Non-volatile Memory Source Region Extension
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Solution Overview
Problem
The variability in source contact plug distances between memory cells in a floating gate flash memory device leads to inconsistent read currents due to the source loading effect, reducing the stability and reliability of memory cell performance.
Innovation Solution
A recess is formed in a semiconductor substrate with a floating gate and control gate, and a common source region with a main body and extension part is created, where the extension part protrudes from the recess base to increase the cross-sectional area of the source region, reducing resistance and mitigating the source loading effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common source line is used to connect source regions of memory cells in series, then the device complexity is reduced, but the source loading effect causes inconsistent read currents and deteriorates memory cell performance
Solution Approach 1:
The common source region is extended in the vertical dimension beyond the recess bottom surface, creating an extension part that protrudes upward. This dimensional extension increases the cross-sectional area of the source region, thereby reducing resistance and mitigating the source loading effect while maintaining the common source line architecture
Solution Approach 2:
The cross-sectional area of the common source region is changed by adding the extension part that protrudes from the recess bottom surface. This parameter change increases the conduction current capability and reduces resistance, directly addressing the source loading effect without requiring individual source contact plugs for each memory cell
2Ease of manufacture
If the source contact plug distance varies between memory cells, then the manufacturing process is simplified, but the resistance values become inconsistent causing read current variability
Solution Approach 1:
Multiple source regions are merged into a single common source region that serves multiple memory cells. The extension part of the common source region protruding from the recess bottom surface provides a unified connection point, eliminating the need for precise individual source contact plug placement while reducing resistance and source loading effect
Data Source
AI summary
An NVM device includes a semiconductor substrate, a first floating gate, a first control gate, a first drain region, and a common source region. The semiconductor substrate has a recess extending downward from the substrate surface. The first floating gate is disposed in the recess, has a base and a side wall connecting to the base. The first control gate is disposed on and adjacent to the first floating gate. The first drain region is disposed in the semiconductor substrate in the recess. The common source region is formed in the semiconductor substrate in the recess, is adjacent to the first floating gate, and includes a main body and an extension part. The main body is disposed below a bottom surface of the recess and adjacent to the base. The extension part extends upward from the bottom surface beyond the base to be adjacent to the side wall.