Non-Volatile Memory Spacer Length Control for Contact Alignment
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Solution Overview
Problem
In the manufacturing of non-volatile memory devices, the reduction in cell drain size due to shrinking device sizes complicates the formation of spacers, leading to misalignment issues and increased contact resistance, particularly when using nitride spacers and borderless nitride layers, which can result in voids and reduced effective contact areas.
Innovation Solution
The method involves reducing the length of spacers in the matrix memory cells while maintaining a protective dielectric layer, using selective etching steps and photo-lithographic masking to form shorter spacers that allow for wider contact areas and improved alignment, thereby reducing contact resistance and enhancing manufacturing precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the device size is reduced to increase integration density, then productivity and device miniaturization are improved, but the cell drain size becomes too small leading to misalignment issues and increased contact resistance
Solution Approach 1:
The patent divides the spacer formation into multiple stages using different dielectric materials (first dielectric layer for initial spacers, second dielectric layer for additional spacing). This segmented approach allows incremental increase of spacer length without requiring a single large-scale process, thereby maintaining manufacturing precision while supporting device miniaturization
Solution Approach 2:
The patent extends the spacer structure in the vertical dimension by forming spacers that protrude from the side walls of gate electrodes. This vertical extension provides additional spacing in the lateral direction, effectively increasing contact area and reducing contact resistance without expanding the planar footprint, thus resolving the contradiction between miniaturization and alignment precision
2Reliability
If nitride spacers and borderless nitride layers are used to protect cell walls, then device reliability is improved, but voids are formed and effective contact areas are reduced
Solution Approach 1:
The patent applies different dielectric materials at different locations: a first dielectric material forms spacers at critical regions where precise contact formation is needed, while a second dielectric material provides additional protection in other areas. This localized differentiation allows the contact areas to maintain precision while cell walls receive adequate protection, resolving the contradiction between reliability and contact area precision
Solution Approach 2:
The patent changes the material parameters by using dielectric layers with different properties (different dielectric materials) rather than a uniform nitride layer. This material parameter change eliminates void formation issues associated with nitride while maintaining the protective function, thereby preserving both reliability and contact area precision
3Reliability
If spacer length is increased to provide adequate spacing, then device reliability is improved, but misalignment issues increase and contact resistance increases
Solution Approach 1:
The patent segments the spacer formation process into multiple steps with different dielectric materials, where each layer contributes a portion of the total spacer length. This segmentation allows the total spacer length to be increased for reliability while each individual deposition step remains within precise manufacturing tolerances, preventing cumulative alignment errors
Solution Approach 2:
The patent introduces an intermediate dielectric layer between the first and second dielectric layers. This intermediate layer acts as a mediator that facilitates the formation of longer spacers through controlled sequential deposition, allowing each layer to be formed with precise alignment while achieving the cumulative length needed for reliable device operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the available space for drain contacts, minimizes misalignment issues, and maintains effective contact resistance, improving the reliability of non-volatile memory devices by ensuring proper contact formation and reduced voids during the deposition of pre-metal dielectric layers.
Implementation Method 1
shielding the gates of the transistors of the circuitry with a photo-lithographic mask
Implementation Method 2
carrying out a selective etching step of the second coating layer in areas left exposed by the photo-lithographic mask to completely remove the first coating spacers of the matrix
Data Source
AI summary
A method manufactures non-volatile memory devices integrated on a semiconductor substrate and including a matrix of non-volatile memory cells and associated circuitry. The manufacturing method includes: forming a plurality of electrodes of the matrix memory cells, each electrode including a first dielectric layer, a first conductive layer, a second dielectric layer and a second conductive layer; and forming a plurality of electrodes of transistors of the circuitry each including a first dielectric layer and a first conductive layer. The method also includes forming first coating spacers on the side walls of the gate electrodes of the memory cell and second coating spacers on the side walls of the gate electrodes of the circuitry, the second spacers being wider than the first spacers.