NVM Global Transaction Log for Power-Tearing Protection

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Solution Overview

Problem

Existing non-volatile memory (NVM) systems face challenges in power tearing protection, as power loss during write operations can lead to loss of data integrity and increased complexity due to the need for multiple atomic flags per page, which are costly and time-consuming to maintain.

Innovation Solution

Implementing a global transaction log (GTL) that stores metadata information related to each ongoing content update transaction, using a global transaction log which stores metadata information related to each ongoing content update transaction, using a global transaction log which protects the stored information with an atomic flag, reducing the number of atomic flags required to dependent on the size of the transaction log rather than the NVM.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple atomic flags are used for each memory page to provide power tearing protection, then data integrity is improved, but area cost increases

Engineering Contradiction:
Improvedata integrityVSAvoidarea cost
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the atomic flag functionality from multiple per-page flags into a single global atomic flag that protects all memory pages. This consolidation reduces the total number of atomic flags from multiple per-page flags to just one global flag, thereby reducing area cost while maintaining data integrity protection across all pages through the unified flag mechanism.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The global atomic flag serves as a universal protection mechanism for all memory pages simultaneously, rather than having dedicated flags for each page. This multi-functional approach allows a single atomic flag to provide tearing protection across the entire memory space, reducing the overall flag count and area requirements while maintaining comprehensive protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple atomic flags are used for each memory page to provide power tearing protection, then data integrity is improved, but access time increases

Engineering Contradiction:
Improvedata integrityVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By merging multiple per-page atomic flags into a single global atomic flag, the patent reduces the number of flag updates required from multiple sequential operations to a single atomic operation. This consolidation eliminates the time penalty associated with updating multiple flags, thereby reducing access time while maintaining comprehensive data integrity protection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the protection mechanism from the page-level operations, allowing the global atomic flag to be updated independently and atomically without requiring sequential updates to multiple per-page flags. This segmentation enables faster access by decoupling the protection mechanism from page-specific operations.

Inventive Principle:
Principle #1Segmentation

3Reliability

If multiple atomic flags are used for each memory page to provide power tearing protection, then protection coverage is improved, but maintenance complexity increases

Engineering Contradiction:
Improveprotection coverageVSAvoidmaintenance complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the maintenance burden of multiple per-page atomic flags into a single global atomic flag, dramatically simplifying the maintenance task. Instead of needing to track, update, and strengthen multiple flags across different pages, the system only needs to manage one global flag, reducing maintenance complexity from O(n) to O(1) where n is the number of pages.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The global atomic flag provides universal protection coverage for all memory pages while serving as a single point of maintenance. This universality allows the system to maintain comprehensive protection with a single flag that covers the entire address space, eliminating the need for page-specific maintenance operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4571522B1Power tearing protection within a non-volatile memory (NVM)
Publication Date: 2026.04.29 NXP BV
  • EP4571522B1 patent drawingFigure 1
  • EP4571522B1 patent drawingFigure 2
  • EP4571522B1 patent drawingFigure 3A

AI summary

A non-volatile memory (NVM) system includes a memory array divided into physical pages, control circuitry, and a global transaction log (GTL). Each physical page is configured to store a corresponding payload and corresponding metadata for the physical page. Each entry of the GTL is configured to store a transaction descriptor identifying a transaction and a corresponding physical page used by the transaction. Each entry also has a corresponding transaction log entry (TLE) flag. The control circuitry is configured to populate the entries of the GTL in sequential order with each new transaction, and, in response to completing storing the transaction descriptor for a new transaction, program the corresponding TLE flag by toggling its logic state.