NVM Read Failure Detection via Multi-Voltage Wear Diagnostics

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Solution Overview

Problem

Non-volatile memory (NVM) systems face challenges in detecting imminent read failures due to unacceptable wear rates, which can lead to catastrophic results in sensitive applications, as existing error correction codes may inaccurately detect or fail to correct multiple-bit errors.

Innovation Solution

The system employs two diagnostic modes with different read voltage levels to detect uncorrectable errors in NVM cells, recording first and second failure times to compare against a threshold wear time value, indicating an imminent read failure if the wear rate is deemed unacceptable, and separately assesses wear rates for erased and programmed cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction codes are used to detect and correct bit errors, then data reliability is improved, but the system cannot accurately detect multiple-bit errors or distinguish between correctable and uncorrectable errors

Engineering Contradiction:
Improvedata reliabilityVSAvoiderror detection precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent segments the error detection process into multiple diagnostic modes with different read voltage levels. Each diagnostic mode operates at a specific voltage threshold that creates distinct error detection characteristics, allowing the system to differentiate between single-bit errors (correctable) and multiple-bit errors (uncorrectable) by observing which voltage levels produce errors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the read voltage parameter across multiple diagnostic modes to create different detection sensitivities. By varying the read voltage levels, the system can detect errors at different thresholds, enabling precise characterization of wear states and differentiation between correctable and uncorrectable error conditions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If diagnostic modes with multiple read voltage levels are implemented, then wear rate detection accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvewear rate detection accuracyVSAvoiddiagnostic mode complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a universal diagnostic framework where multiple read voltage levels serve multiple functions: detecting wear rates, identifying error types, and characterizing cell degradation. The same diagnostic infrastructure handles various detection tasks by simply changing the voltage parameter, avoiding the need for separate dedicated circuits for each detection function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system employs periodic diagnostic operations that cycle through different read voltage levels at scheduled intervals. This periodic multi-level diagnostics approach allows wear accumulation to be detected over time while managing complexity through structured, repeatable measurement sequences rather than continuous complex monitoring.

Inventive Principle:
Principle #19Periodic action

3Reliability

If continuous monitoring of read errors is performed, then imminent failure detection is improved, but time consumption increases

Engineering Contradiction:
Improveimminent failure detectionVSAvoidmonitoring time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary diagnostic operations at defined intervals to establish baseline wear rates and error characteristics before failures occur. By conducting these preliminary multi-level diagnostics periodically, the system can detect trends and predict imminent failures without requiring continuous real-time monitoring, thus reducing time loss while maintaining detection capability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9329932B2Imminent read failure detection based upon unacceptable wear for NVM cells
Publication Date: 2016.05.03 NXP USA INC
  • US9329932B2 patent drawing
  • US9329932B2 patent drawing
  • US9329932B2 patent drawing

AI summary

Methods and systems are disclosed for imminent read failure detection based upon unacceptable wear for non-volatile memory (NVM) cells. In certain embodiments, a first failure time is recorded when a first diagnostic mode detects an uncorrectable error within the NVM cell array using a first set of read voltage levels below and above a normal read voltage level. A second failure time is recorded when a second diagnostic mode detects an uncorrectable error within the NVM cell array using a second set of read voltage levels below and above a normal read voltage level. The first and second failure times are then compared against a threshold wear time value to determine whether or not an imminent read failure is indicated. The diagnostic modes can be run separately for erased NVM cell distributions and programmed NVM cell distributions to provide separate wear rate determinations.