Non-Volatile Memory Wear Leveling via Block Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory systems, such as flash memory, face uneven wear and degradation due to repetitive programming and erasing, leading to performance compromise and resource wastage, as some blocks wear out faster than others, necessitating effective wear leveling methods to prolong lifespan.
Innovation Solution
A memory managing method that groups blocks into memory units, tracks usage through a reference table, and performs wear leveling by selecting blocks with lower erasure counts for data programming, ensuring even usage and preventing concurrent erasure of unused blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If blocks are repetitively programmed and erased, then data can be stored and updated, but wear increases and blocks degrade
Solution Approach 1:
The flash memory storage system is divided into multiple blocks, each with its own wear counter. The controller tracks and manages individual block wear states, enabling selective programming of less-worn blocks while avoiding over-use of specific blocks. This segmentation allows the system to maintain high data programming capability while extending overall block lifespan through targeted wear management.
2Productivity
If the same logical block addresses are repeatedly used, then data access is efficient, but physical blocks experience uneven wear
Solution Approach 1:
The system dynamically maps logical block addresses to physical blocks based on real-time wear state information. The controller maintains a mapping table that associates LBA with current physical block locations, and this mapping is dynamically updated during wear leveling operations. This dynamic reconfiguration allows the system to maintain efficient data access patterns while distributing wear evenly across all physical blocks.
Solution Approach 2:
The system changes the mapping parameter between logical and physical block addresses based on wear state. When wear leveling is triggered, the controller redistributes LBAs to different physical blocks, effectively changing the mapping parameter. This parameter change enables the system to maintain access efficiency while achieving uniform wear distribution across the memory array.
3Reliability
If wear leveling operations are performed, then uniform wear is achieved, but system complexity increases
Solution Approach 1:
The wear leveling system operates autonomously by monitoring individual block wear states through counters and automatically triggering redistribution operations when threshold conditions are met. The controller self-manages the mapping table updates and block selection without external intervention. This self-service capability achieves uniform wear distribution while minimizing the operational complexity burden on the host system.
4Reliability
If blocks are selected for programming based on lowest wear count, then wear is evenly distributed, but access speed may be reduced
Solution Approach 1:
The system performs preliminary wear state assessment by maintaining counters for each block's program-erase cycle count. Before programming operations, the controller queries the mapping table and wear counters to identify the least-worn available blocks. This preliminary action enables the system to pre-determine optimal target blocks, minimizing wear while maintaining efficient programming speeds through advance planning rather than real-time complex calculations.
Data Source
AI summary
A memory managing method for a non-volatile memory and a controller using the same are disclosed. The controller includes a system wear leveling member for performing a first wear leveling process in a non-volatile memory for choosing a memory unit; and a subsystem wear leveling member for performing a second wear leveling process in the chosen memory unit for selecting a block from the chosen memory unit for data programming; whereby uneven use of the blocks of the chosen memory unit is avoided.


