NVMe SSD Abort Command via Admin Queue and Doorbell Registers
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Solution Overview
Problem
Existing methods for aborting commands in PCIe-based NVMe SSDs are uncertain and lack a mechanism to abort target commands still in the host I/O submission queue, leading to potential delays and inconsistencies in abort operations.
Innovation Solution
A method and system for aborting commands in PCIe-based NVMe SSDs, which involves receiving an abort command in the Admin submission queue, updating the tail doorbell of NVMe doorbell registers, placing the abort command into the Admin queue of the NVMe SSD, and executing the abort command using slot information to update the I/O completion queue, ensuring consistent and timely abort operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the NVMe SSD waits for a specific number of commands or time before aborting a target command, then the system maintains simple abort logic, but the abort operation becomes uncertain and may fail to abort commands still in the host submission queue
Solution Approach 1:
The patent applies preliminary action by updating the tail doorbell register before placing the abort command in the Admin queue. This ensures the NVMe SSD is notified in advance and can immediately process the abort command without waiting for command completion or time delays, thus improving both reliability and response time of the abort operation
Solution Approach 2:
The patent implements feedback mechanisms through doorbell registers (tail doorbell and head doorbell) that provide real-time status information between the host and NVMe SSD. The host updates the tail doorbell to signal new commands, and the NVMe SSD updates the head doorbell to indicate command completion, enabling immediate abort execution by providing feedback on command processing status
2Adaptability or versatility
If the system uses a waiting mechanism for abort commands, then the implementation remains simple, but commands in the host I/O submission queue cannot be aborted
Solution Approach 1:
The patent uses doorbell registers as intermediaries between the host and NVMe SSD. The tail doorbell register acts as a mediator to signal the host has placed an abort command in the Admin queue, and the head doorbell register mediates the completion status. This intermediary mechanism enables the NVMe SSD to detect and execute abort commands for any target command in the submission queue without complex polling or waiting logic
Solution Approach 2:
The patent segments the command processing into distinct queues (I/O submission queue, Admin submission queue, I/O completion queue, Admin completion queue) and uses slot information to identify specific target commands. This segmentation allows the abort mechanism to selectively target and abort specific commands while maintaining independent processing of other commands, increasing adaptability without proportionally increasing complexity
Data Source
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AI summary
A method for aborting a command in PCIe based NVMe SSD includes receiving an abort command in an Admin submission queue to abort a target command present in an I/O submission queue of host or in an I/O queue of the NVMe SSD and updating a tail doorbell of NVMe doorbell registers of the NVMe SSD after receiving the abort command. The abort command includes a slot of the target command to be aborted. Thereafter, the method includes placing the abort command into an Admin queue of the NVMe SSD and executing the abort command using the slot of the target command to be aborted by updating an I/O completion queue of the host with the target command to be aborted. The method further includes updating a head doorbell of the doorbell registers of the NVMe SSD and updating the abort command in an Admin completion queue of the host.