Non-Volatile Memory Boot Code Execution via Processor Cache
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current computing systems face inefficiencies in booting processes due to reliance on cache as random access memory (CAR mode), which limits the size of pre-memory firmware, necessitates slow code decompression, and introduces complex boot flows, especially with non-volatile block media that doesn't support memory mapping, leading to prolonged boot times and increased complexity.
Innovation Solution
Implementing non-volatile memory that supports two-level operation (2LM) for persistent storage, allowing the BIOS to store the entire image uncompressed and utilize the processor cache hierarchically, eliminating the need for intermediary memory areas and enabling unified boot flows across various storage technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If cache as random access memory (CAR) mode is used for boot, then code execution is enabled in early boot environment, but pre-memory firmware size is limited and boot time is prolonged
Solution Approach 1:
The patent applies preliminary action by copying and decompressing boot code from non-volatile storage to processor cache during system initialization before normal operation begins. This pre-positioning of code in high-speed cache memory enables faster execution during boot and eliminates the need to repeatedly access slower storage media, directly resolving the contradiction between boot speed and firmware size capacity.
2Ease of operation
If cache as random access memory (CAR) mode is used for boot, then code execution is enabled, but complex boot flows are introduced especially with non-volatile block media
Solution Approach 1:
The patent extracts the boot code execution function from the complex CAR mode setup by directly copying code from non-volatile storage to processor cache, eliminating the need for intermediate memory areas and complex memory mapping configurations. This simplification removes unnecessary steps from the boot flow while maintaining code execution capability, directly addressing the contradiction between operational simplicity and device complexity.
3Reliability
If code is copied and decompressed from non-volatile storage to main memory, then memory initialization is achieved, but boot time is extended
Solution Approach 1:
The patent introduces processor cache as an intermediary between non-volatile storage and main memory during the boot process. Code is first copied to the high-speed cache from storage, then executed directly from cache without requiring full decomposition and copying to main memory immediately. This intermediary approach maintains reliable memory initialization while significantly reducing boot time by enabling earlier code execution.
Data Source
AI summary
Methods, apparatus, systems and articles of manufacture are disclosed to utilize non-volatile memory for computer system boot. An example processor platform includes a non-volatile memory coupled to a processing unit via a bus, and a microcontroller to: configure the processing unit to store, on the non-volatile memory, a heap and a stack for execution of boot code, and configure the processing unit to execute the boot code stored on the non-volatile memory.