Non-Volatile Memory Boot with Erase Status Checking and Leakage Calibration
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Solution Overview
Problem
Unintended power off during the erase operation of non-volatile memory blocks can lead to Bit Line leakage, causing incomplete erase operations, which may result in booting code failure or prolonged boot times due to shared Bit Lines, especially in consumer electronics where system stability is critical.
Innovation Solution
A method and memory device that includes a status register to track the completion of erase operations and a leakage calibration unit to selectively perform calibration or re-erase processes based on status flags, ensuring successful erase operations and preventing Bit Line leakage by applying appropriate bias voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the erase operation is performed on non-volatile memory blocks, then the memory blocks are cleared for reuse, but unintended power off during erase may cause Bit Line leakage and incomplete erase operations
Solution Approach 1:
The patent performs a status check reading before the erase operation to verify the memory block is in a readable state. This preliminary action prevents attempting erase on already erased or faulty blocks, avoiding subsequent Bit Line leakage issues and ensuring reliable erase completion.
Solution Approach 2:
The patent implements status register checks after erase operations to verify completion. The control logic reads status flags to determine whether erase succeeded or failed, enabling corrective actions like re-erase or calibration. This feedback mechanism prevents Bit Line leakage by ensuring erase operations are properly completed before proceeding.
2Reliability
If Bit Line leakage occurs due to incomplete erase operations, then system booting may fail or take longer, but implementing comprehensive checking and calibration increases system complexity
Solution Approach 1:
The memory device performs self-diagnosis through status register checks and self-correction through automated re-erase or calibration operations. This self-service approach ensures boot reliability without requiring external intervention or complex external checking circuits, balancing reliability with acceptable system complexity.
Solution Approach 2:
The patent combines the status checking, erase operation, and calibration functions into an integrated control sequence within the memory device. By merging these functions, the system achieves reliable boot checking without requiring separate complex external control circuits, thus improving reliability while limiting the increase in overall system complexity.
3Quantity of substance
If multiple memory blocks share the same Bit Line to increase storage capacity, then storage density improves, but Bit Line leakage from one block affects other blocks on the same Bit Line
Solution Approach 1:
The patent performs preliminary status checks on each memory block before erase operations, even when blocks share the same Bit Line. This ensures each block is properly prepared and prevents incomplete erase operations that could cause Bit Line leakage affecting other shared blocks, thus maintaining storage density while preventing interference.
Solution Approach 2:
The patent implements individual status register checking for each memory block after erase operations. This block-level feedback ensures that each block's erase completion is verified independently, preventing Bit Line leakage from affecting other blocks on the same shared Bit Line while maintaining high storage density through efficient block sharing.
Data Source
AI summary
A method of booting a system with a non-volatile memory device includes at least the following steps: when the system is powered on, reading a status flag of at least a memory block of the non-volatile memory device, wherein the status flag indicates whether an erase operation applied to the memory block is successfully completed; selectively performing a leakage calibration process upon the memory block according to the status flag; and booting the system according to a boot code stored in the non-volatile memory device.