NVMe Bounce Buffer Allocation for RDMA Memory Efficiency

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Solution Overview

Problem

The existing RDMA technology for sending NVMe commands over Fabric (NVMe-oF) faces challenges with memory allocation, as it requires pre-allocation of large bounce buffers, which can lead to memory inefficiencies due to persistent allocation even when buffers are empty, especially for millions of outstanding commands.

Innovation Solution

Implementing just-in-time (JIT) allocation and deallocation of NVMe bounce buffers in virtual memory, translating them to physical addresses only when needed, and deallocating them after data is processed, reducing memory footprint and usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pre-allocation of bounce buffers is used for RDMA NVMe commands, then command issuance capability is improved, but memory consumption increases significantly

Engineering Contradiction:
Improvecommand issuance capabilityVSAvoidmemory consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic buffer allocation where bounce buffers are allocated on-demand when needed for RDMA operations rather than being pre-allocated in large quantities. The system allocates buffers dynamically based on actual command requirements, transforming the static memory allocation model into a dynamic one that adapts to real-time needs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the allocation timing parameter from pre-allocation to just-in-time allocation. Buffers are allocated at the moment they are needed for a specific RDMA operation rather than being reserved in advance, fundamentally altering the memory management parameter to reduce overall memory consumption while maintaining operational capability.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If pre-allocation of bounce buffers is used, then RDMA operation readiness is improved, but memory resource efficiency deteriorates

Engineering Contradiction:
ImproveRDMA operation readinessVSAvoidmemory resource efficiency
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent implements a mechanism where bounce buffers are deallocated after use and made available for reuse by subsequent operations. Instead of holding onto allocated buffers indefinitely, the system recovers memory resources by deallocating buffers after their purpose is fulfilled, improving memory resource efficiency while maintaining operational readiness through rapid reallocation.

Inventive Principle:
Principle #34Discarding and recovering

Solution Approach 2:

The system transitions from a static pre-allocated buffer state to a dynamic allocation model where buffers are actively managed - allocated when needed, used for the specific RDMA operation, then deallocated and recovered for future use. This dynamic approach maintains operational readiness without the memory efficiency losses of persistent pre-allocation.

Inventive Principle:
Principle #15Dynamics

3Productivity

If large bounce buffers are allocated for millions of commands, then outstanding command capacity is improved, but system memory pressure increases

Engineering Contradiction:
Improveoutstanding command capacityVSAvoidsystem memory pressure
Core Design Contradiction:
ProductivityVSStress or pressure

Solution Approach 1:

Instead of allocating buffers for all potential outstanding commands in advance, the system uses partial allocation - only allocating buffers as commands are actually issued and need execution. This partial action approach allows the system to handle millions of outstanding commands when necessary while avoiding the excessive memory pressure that would result from pre-allocating for all possible commands simultaneously.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240211392A1Buffer allocation
Publication Date: 2024.06.27 INTEL CORP
  • US20240211392A1 patent drawing
  • US20240211392A1 patent drawing
  • US20240211392A1 patent drawing

AI summary

Examples described herein relate to circuitry to allocate an Non-volatile Memory Express (NVMe) bounce buffer in virtual memory that is associated with an NVMe command and perform an address translation to an NVMe bounce buffer based on receipt of a response to the NVMe command from an NVMe target. In some examples, the circuitry is to translate the virtual address to a physical address for the NVMe bounce buffer based on receipt of a response to the NVMe command from an NVMe target.