NVMe Controller TLP Coalescing for Unaligned LBA Transfer

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Solution Overview

Problem

In NVMe systems over PCIe, the inefficient utilization of transport layer packets (TLPs) leads to performance degradation due to overhead, latency, and increased bandwidth requirements, especially when data is not aligned to TLP boundaries, resulting in suboptimal data transfer.

Innovation Solution

A data storage device controller merges unaligned head and tail portions of logical block addresses (LBAs) when they match previously stored unaligned segments, optimizing TLP utilization by aligning data for efficient transfer within the TLP size, thereby reducing overhead and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is transferred using multiple small TLPs when data exceeds maximum TLP size, then data transfer is enabled, but latency increases and bandwidth efficiency decreases

Engineering Contradiction:
Improvedata transfer speedVSAvoidlatency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent merges multiple small TLPs into larger TLPs by combining data from multiple LBAs. The controller identifies LBAs that are not aligned to TLP boundaries and merges their data with other unaligned LBAs to form complete TLPs, thereby reducing the number of packets and improving bandwidth efficiency while lowering latency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary alignment processing by identifying unaligned LBAs before data transfer. The controller stores metadata about unaligned LBAs and prepares merge operations in advance, allowing data to be consolidated into optimally sized TLPs before transmission, thus reducing latency and improving transfer efficiency.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If data is broken into several smaller TLPs when larger than maximum TLP size, then data transfer is possible, but overhead increases relative to payload

Engineering Contradiction:
Improvedata transfer flexibilityVSAvoidbandwidth overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent combines multiple small data segments from unaligned LBAs into larger TLPs that better utilize the available payload space. By merging unaligned data with other unaligned data, the system reduces the proportion of overhead bytes relative to payload, improving bandwidth efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent dynamically adjusts TLP parameters by varying the size and composition of TLPs based on the alignment characteristics of the data. The controller modifies TLP structure to optimize the payload-to-overhead ratio, changing transmission parameters to match data characteristics.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If unaligned LBAs are transferred without merging, then transfer simplicity is maintained, but TLP utilization efficiency decreases

Engineering Contradiction:
Improvetransfer simplicityVSAvoidTLP utilization efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The controller automatically performs the merging of unaligned LBAs without requiring complex external coordination. The system self-manages the identification, matching, and merging of unaligned data segments, maintaining operational simplicity while improving efficiency through automated optimization.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The controller performs preliminary analysis of LBA alignment before transfer, identifying unaligned segments and preparing merge operations in advance. This preliminary processing automates the optimization process, maintaining ease of operation while significantly improving TLP utilization efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11853218B2Semi and cached TLP coalescing
Publication Date: 2023.12.26 SANDISK TECHNOLOGIES LLC
  • US11853218B2 patent drawing
  • US11853218B2 patent drawing
  • US11853218B2 patent drawing

AI summary

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a command, wherein the command comprises a plurality of logical block addresses (LBAs), determine that one or more LBAs of the plurality of LBAs are not aligned to a transfer layer packet (TLP) boundary, determine whether the one or more LBAs that are not aligned to a TLP boundary has a head that is unaligned that matches a previously stored tail that is unaligned, and merge and transfer the head that is unaligned with a previously stored tail that is unaligned when the head that is unaligned matches the previously stored tail that is unaligned.