Non-Volatile Memory Controller Space Trimming via Bitmap Cache
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Solution Overview
Problem
The existing space trimming technologies for non-volatile memory, such as flash memory, are inefficient due to the time-consuming process of downloading, modifying, and sealing large sub-tables of the host-to-device mapping table, especially when dealing with huge trimming spaces, which affects the performance of data storage devices.
Innovation Solution
A new space trimming scheme where the controller programs a trimming tag into the cache area and flushes it into non-volatile storage, postponing the update of the host-to-device mapping table until free intervals, using a temporary storage device to manage trimming information and update the table dynamically, thereby reducing the burden of downloading and modifying sub-tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller downloads, modifies, and seals large sub-tables of the host-to-device mapping table for space trimming, then the trimming operation can be completed, but the process is time-consuming and reduces device performance
Solution Approach 1:
The host-to-device mapping table is divided into multiple sub-tables, each managing a specific logical address range. When trimming is needed, only the relevant sub-table is downloaded, modified, and sealed back to non-volatile memory, rather than processing the entire mapping table. This segmentation significantly reduces the time and computational resources required for trimming operations while maintaining complete tracking of logical-to-physical address mappings.
2Measurement precision
If the controller updates the host-to-device mapping table frequently to maintain accurate trimming status, then the mapping accuracy is improved, but the device performance and response time to commands deteriorate
Solution Approach 1:
The controller checks the trimming bitmap before executing write commands to determine if the target logical address range has been trimmed. This preliminary check prevents unnecessary write operations to trimmed regions, improving device responsiveness. The trimming bitmap is maintained in memory and updated asynchronously during free intervals, so command execution is not blocked by mapping table updates.
Solution Approach 2:
The controller updates the host-to-device mapping table asynchronously during free intervals between command executions, rather than synchronously during each trimming operation. This periodic updating approach maintains mapping accuracy over time while ensuring that command processing is not delayed by table update operations, thus preserving device productivity.
3Reliability
If the controller processes large trimming spaces by downloading and modifying entire sub-tables, then complete trimming coverage is achieved, but the complexity of the trimming process increases
Solution Approach 1:
The mapping table is segmented into multiple sub-tables, each corresponding to a specific logical address range. This segmentation allows the controller to process only the relevant sub-table for each trimming operation, reducing the complexity of data manipulation. The controller downloads only the necessary sub-table, applies trimming modifications, and seals it back to non-volatile memory, rather than processing the entire mapping table structure.
Solution Approach 2:
The controller uses a trimming bitmap as an intermediary data structure to track trimming status of logical address ranges. This bitmap provides a simplified interface for managing trimming operations, allowing the controller to quickly identify which regions have been trimmed without complex queries to the full mapping table. The bitmap acts as a mediator between the trimming commands and the detailed sub-table structures.
Data Source
AI summary
The background update of a host-to-device mapping (H2F) table designed for an efficient space trimming technology of data storage devices is shown. A controller handles a target bit in a trimming bitmap (TBM) and updates the H2F table to store information regarding the trimming status of a trimming target which has a specific length and is marked by the target bit. The controller programs the starting logical address and trimming length of the trimming target into a cache area of the temporary storage device. After the target bit handling, the controller flushes a sub-table of the trimming bitmap that manages the target bit from the cache area into the non-volatile memory.