NVMe SSD Direct Host Data Transmission via PCIe
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Solution Overview
Problem
Existing RAID systems struggle to achieve direct data transmission between a host and an NVMe SSD due to time delays and bandwidth limitations caused by intermediate buffering and processing in the RAID controller.
Innovation Solution
The proposed solution involves a method, system, and apparatus for data transmission that eliminates the need for intermediate data transmission instruction processing and data moving on the storage array card, allowing direct data transmission between the host and the NVMe SSD via PCIe buses, using address mapping logic to map control and storage address spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data transmission is performed through the RAID controller with intermediate buffering, then data transmission can be controlled by the RAID controller, but time delay increases and transmission efficiency decreases
Solution Approach 1:
The patent extracts the data transmission control function from the RAID controller by enabling NVMe SSDs to directly access host memory through PCIe buses. The RAID controller retains only the management and coordination functions, while the actual data transmission path bypasses the controller's buffer, eliminating the time delay caused by intermediate buffering.
Solution Approach 2:
The patent introduces a new intermediary mechanism - the PCIe bus direct connection - that allows NVMe SSDs to communicate directly with the host system. This new intermediary bypasses the traditional RAID controller buffer, reducing transmission delay while maintaining system control through the storage array card's address mapping logic.
2Reliability
If data transmission is performed through the RAID controller with intermediate buffering, then data transmission can be controlled, but transmission speed decreases
Solution Approach 1:
The patent extracts the data transmission path from the RAID controller's buffer, creating a direct PCIe connection between NVMe SSDs and host memory. This extraction eliminates the bandwidth bottleneck of the RAID controller buffer, enabling transmission speeds that match the NVMe SSD capabilities.
Solution Approach 2:
The patent changes the data transmission dimension by introducing a parallel direct path alongside the traditional RAID controller path. Data can now flow directly between NVMe SSDs and host memory through PCIe buses, creating a high-speed dimension that bypasses the limited bandwidth of the controller buffer.
3Productivity
If address mapping logic is implemented in the storage array card, then direct data transmission between host and NVMe SSD is enabled, but device complexity increases
Solution Approach 1:
The patent segments the address mapping function into the storage array card, separating it from the RAID controller's data transmission path. The storage array card handles address translation independently, allowing direct data transmission without requiring the RAID controller to process address translations, thus improving efficiency while distributing complexity to a dedicated component.
4Reliability
If intermediate data transmission instruction processing is performed on the storage array card, then data can be transmitted through the RAID controller, but transmission efficiency decreases
Solution Approach 1:
The patent extracts intermediate data transmission instruction processing from the storage array card for direct PCIe paths. While the storage array card maintains address mapping capabilities, actual data transmission instructions bypass the card when using direct PCIe connections, eliminating processing delays and improving transmission efficiency while retaining control capabilities.
Data Source
AI summary
Disclosed are a method, system and apparatus for data transmission, and a storage medium, which relate to the field of data transmission, and are used for transmitting data. Address mapping logic is provided in a storage array card, and a host maps a storage address space thereof to the storage array card by the address mapping logic of the storage array card; and after a data transmission instruction is sent to an NVMeSSD by a hard disk control mapping address in the storage array card, the NVMeSSD can directly perform data transmission on the basis of the data transmission instruction and a host storage mapping address in the storage array card, that is, the NVMeSSD can directly perform data transmission with the storage address space inside the host.