Just-in-Time Data Buffer Pointer Fetching for NVMe DMA
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Solution Overview
Problem
Existing non-volatile storage systems face inefficiencies in data buffer pointer management, leading to wasted memory and performance degradation due to premature or delayed fetching of data buffer pointers, as well as unnecessary re-fetching of the same pointers.
Innovation Solution
Implementing a controller that fetches data buffer pointers just-in-time over the PCIe bus, optimizes packet size for efficient transfer, and re-uses saved pointers to avoid redundant fetching, allowing for out-of-order data transfer and efficient storage usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data buffer pointers are fetched too soon, then data transfer can begin without delay, but memory is wasted storing pointers that are not yet needed
Solution Approach 1:
The system performs preliminary actions by fetching data buffer pointers in advance and storing them in an on-chip buffer, but only to the extent needed and at the right time. This allows the data transfer to begin without delay while avoiding waste by limiting the preliminary fetching to what is actually required for upcoming transfers.
Solution Approach 2:
The system dynamically adjusts the fetching and storage of data buffer pointers based on real-time needs. Rather than statically pre-fetching all pointers or fetching them one-at-a-time, the system adaptively manages the buffer contents to match the dynamic requirements of data transfer operations, optimizing both speed and memory usage.
2Quantity of substance
If data buffer pointers are fetched too late, then memory is used efficiently, but performance degrades due to delay in data transfers
Solution Approach 1:
The system performs preliminary actions by fetching data buffer pointers in advance and storing them in an on-chip buffer, but only to the extent needed and at the right time. This allows the data transfer to begin without delay while avoiding waste by limiting the preliminary fetching to what is actually required for upcoming transfers.
3Ease of operation
If the same data buffer pointer is fetched multiple times, then each data transfer operation can proceed independently, but bandwidth is wasted and performance degrades
Solution Approach 1:
The system creates a copy of the data buffer pointer in the on-chip buffer after the first fetch. Subsequent DMA operations can independently access this copied pointer without requiring additional fetches over the PCIe bus, eliminating redundant bandwidth consumption while maintaining operational independence.
Solution Approach 2:
The system merges multiple independent pointer access operations into a single fetch operation by storing the pointer in a shared on-chip buffer. This allows multiple DMA operations to share the same fetched pointer data, reducing the total number of PCIe bus transactions while maintaining the independence of each DMA operation.
4Productivity
If all data buffer pointers are fetched and stored in memory, then any DMA operation can proceed immediately, but a large amount of memory is consumed
Solution Approach 1:
The system extracts only the essential function of storing data buffer pointers by implementing a small on-chip buffer that holds pointers temporarily during DMA operations. This extracts the critical memory storage function from the full system memory, providing quick access for DMA readiness while consuming minimal on-chip memory resources.
Solution Approach 2:
The system dynamically adjusts the fetching and storage of data buffer pointers based on real-time needs. Rather than statically pre-fetching all pointers or fetching them one-at-a-time, the system adaptively manages the buffer contents to match the dynamic requirements of data transfer operations, optimizing both speed and memory usage.
Data Source
AI summary
Technology is described herein for operating non-volatile storage. In one aspect, a memory controller fetches pointers to data buffers in host system memory just-in-time. For example, just before the memory system is ready perform a DMA the pointers may be fetched. The data buffer pointers may be NVMe Physical Region Page (PRP) entries in a PRP list. The same data buffer pointer need not be fetched more than once. For example, responsive to the non-volatile memory system determining that a data buffer pointer might be needed a second time (e.g., for a different DMA), that data buffer pointer is saved such that it can be re-used. In one aspect, if a DMA does access all of a host data buffer, the pointer to that buffer is saved so that it does not need to be fetched again.