NVMe DRAM Cache Write Acceleration for Storage Arrays
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Solution Overview
Problem
Current storage systems face inefficiencies in handling write I/O operations due to high bandwidth usage and performance bottlenecks when mirroring dirty data between storage processors, leading to reduced performance and increased costs.
Innovation Solution
The integration of NVMe devices with DRAM cache allows for direct data writing and metadata synchronization between storage processors, reducing internal data copies and bandwidth usage, and enabling efficient write I/O acceleration by using NVMe devices as a write cache.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is mirrored between storage processors for reliability, then data integrity is improved, but bandwidth usage increases and performance decreases
Solution Approach 1:
The patent extracts the mirroring operation from the critical write I/O path by using a write cache to store data temporarily. This allows the write I/O to complete immediately while mirroring occurs in the background, separating the reliability mechanism from the performance-critical path.
Solution Approach 2:
The write cache acts as an intermediary between the storage processors, allowing data to be stored locally first and then synchronized to the peer storage processor. This mediator enables asynchronous mirroring that doesn't block the primary write operation.
2Reliability
If data is mirrored between storage processors for reliability, then data integrity is improved, but hardware costs increase
Solution Approach 1:
The patent performs preliminary caching of write data in the write cache before mirroring to the peer storage processor. This preliminary action allows the system to acknowledge the write immediately while deferring the resource-intensive mirroring operation to a lower priority time slot.
3Reliability
If internal data copies are performed for data redundancy, then reliability is improved, but bandwidth usage increases
Solution Approach 1:
The patent implements periodic or deferred mirroring operations instead of immediate synchronous copying. The write cache holds data and allows mirroring to occur periodically or when bandwidth is available, reducing the immediate bandwidth burden while maintaining eventual data redundancy.
Data Source
AI summary
A method, computer program product, and computer system for receiving, by a computing device, a write I/O to a storage device array coupled to a cache, wherein the write I/O may be received from a host. A cache miss in the cache may be determined for the write I/O. One or more free pages may be allocated at an address in the cache to store data for the write I/O. The address in the cache to store the data may be sent to a hostside portion of a software stack in the storage device array. The data may be written directly from the hostside portion to the cache at the address.