Non-Volatile Memory Erase Marker Bits for Interrupt Recovery

The patent applies preliminary action by setting erase marker bits to specific values (e.g., 0xFF) before initiating erase operations. These marker bits are prepared in advance in each sector to track erase progress. When an interrupt occurs, the pre-set marker bits allow the system to detect the interrupted state and resume the erase operation from the correct position, preventing memory cells from being left in unknown states.

The patent implements feedback by continuously monitoring the erase marker bits during erase operations. The controller reads the marker bit values to determine whether erase operations have been completed or interrupted. This feedback mechanism enables the system to detect abnormal conditions and take appropriate corrective actions, such as resuming interrupted erase operations or performing recovery procedures.

The patent applies segmentation by dividing the erase tracking function into individual sector-level operations. Each sector has its own erase marker bits that independently track the erase status of that specific sector. This segmentation allows the controller to manage erase operations at a fine-grained level, resuming only the affected sectors rather than managing the entire memory device as a single unit, thereby reducing overall complexity.

The patent implements self-service by using the erase marker bits stored in the memory itself to track and manage erase operation status. The memory device maintains its own erase state information without requiring external tracking mechanisms. This self-service approach eliminates the need for separate complex external controllers or additional hardware components to monitor erase progress.