File-Based Interrupt Coalescing in NVMe Storage Controllers
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Solution Overview
Problem
In environments using the Non-Volatile Memory Express (NVMe) specification, data storage devices face inefficiencies due to frequent interrupts caused by completion of commands, which can lead to increased CPU load and reduced system responsiveness, particularly in high-performance applications like gaming where interrupt storms can occur even when only small data accesses are made.
Innovation Solution
Implementing a method for file-based interrupt coalescing in data storage devices, where interrupts are sent only after specific read events, such as reading an end-of-file extent, and using dedicated queues that bypass the file system, allowing the controller to delay interrupts until a predetermined read event occurs or until previously submitted read commands are completed, thereby optimizing interrupt coalescing for gaming workloads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interrupts are sent for every command completion, then the host is promptly notified of completion status, but CPU load increases and system responsiveness decreases
Solution Approach 1:
Multiple individual interrupt notifications are merged into a single coalesced interrupt notification. The controller accumulates multiple command completion statuses and combines them into one interrupt event sent to the host, reducing the frequency of interrupts while ensuring all completions are communicated.
Solution Approach 2:
The controller performs preliminary accumulation of command completion statuses before sending the interrupt notification. By pre-collecting multiple completion events in a buffer and only notifying the host when a threshold is reached or a specific condition is met, the system reduces interrupt frequency while maintaining completion tracking.
2Productivity
If interrupt coalescing is implemented to reduce CPU load, then system responsiveness improves, but interrupt notification delay increases
Solution Approach 1:
The interrupt coalescing mechanism dynamically adjusts its behavior based on conditions. The controller can switch between immediate interrupt notification and coalesced notification based on factors such as queue depth, command types, and host readiness, optimizing the balance between responsiveness and CPU load reduction.
Solution Approach 2:
The system changes the timing parameter of interrupt notification based on conditions. Instead of fixed immediate notification, the notification time is adjusted dynamically - sometimes immediate, sometimes delayed until coalescing conditions are met - allowing optimization of both responsiveness and CPU utilization.
3Productivity
If dedicated queues are used for application commands, then interrupt coalescing efficiency improves, but device complexity increases
Solution Approach 1:
The command processing system is segmented into dedicated queues for different applications or command types. By separating commands into distinct queues (e.g., one queue per application), the controller can independently manage interrupt coalescing for each queue, improving efficiency while organizing complexity into manageable segments.
Data Source
AI summary
A data storage device and method for file-based interrupt coalescing are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to execute a plurality of read commands read from a submission queue in a host; write a plurality of completion messages to a completion queue in the host; and coalesce interrupts to inform the host that plurality of completion messages were written to the completion queue; wherein the submission queue and the completion queue are dedicated to read commands from a host application and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.