Non-Volatile Memory Plane Isolation for Neighbor Disturb Mitigation
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Solution Overview
Problem
In non-volatile memory structures, the proximity of closely packed memory cells leads to increased manufacturing and operational errors, such as electrical shorting between adjacent word lines, resulting in neighbor plane disturb (NPD) conditions that disrupt programming voltage and prevent complete programming of non-defective memory planes.
Innovation Solution
A countermeasure method that initiates a program pulse and subsequent verify operation using a bit scan mode, with loop count increments to detect incomplete programming, applying a rollback voltage to resume programming once a threshold is exceeded, ensuring complete programming of non-defective planes while isolating defective ones.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are closely packed to increase storage density, then storage capacity is improved, but manufacturing and operational errors increase due to electrical shorting between adjacent word lines
Solution Approach 1:
The memory structure is divided into multiple independent planes, each plane being separately addressable and programmable. When a defective plane is detected through the bit scan mode during programming verification, the system can isolate and exclude that plane from further operations, allowing other non-defective planes to continue programming without interference. This segmentation enables the system to maintain high storage capacity while mitigating reliability issues by treating each plane as an independent operational unit.
2Productivity
If neighbor plane disturb conditions occur due to defective planes, then programming of non-defective planes is disrupted, but continuing programming operations is necessary to maintain productivity
Solution Approach 1:
The system implements a feedback mechanism through the bit scan mode that continuously monitors programming verification results across all planes during the programming process. When a defective plane is detected, the feedback loop triggers an isolation protocol that prevents NPD conditions from propagating to other planes. This real-time monitoring and adaptive response enables the system to maintain high programming throughput by quickly identifying and excluding only the affected planes, while non-defective planes continue to be programmed successfully.
3Reliability
If a defective plane causes NPD conditions, then voltage disruption prevents complete programming of other planes, but isolating the defective plane is necessary to restore programming
Solution Approach 1:
The system performs preliminary detection of defective planes using the bit scan mode during the programming verification phase, before NPD conditions can disrupt other planes. By proactively identifying defective planes early in the programming process, the system can pre-emptively isolate them using plane isolation mechanisms, thereby preventing voltage disruptions from affecting other planes. This preliminary action approach simplifies the overall control logic by establishing clear detection-isolation-continuation protocols rather than requiring complex real-time intervention mechanisms.
Data Source
AI summary
Countermeasure method for programming a non-defective plane of a non-volatile memory experiencing a neighbor plane disturb, comprising, once a first plane is determined to have completed programming of a current state but where not all planes have completed the programming, a loop count is incremented and a determination is made as to whether the loop count exceeds a threshold. If so, programming of the incomplete plane(s) is ceased and programming of the completed plane(s) is resumed by suspending the loop count and bit scan mode, and, on a next program pulse, applying a pre-determined rollback voltage to decrement a program voltage bias. The loop count and bit scan mode are resumed once a threshold voltage level equals a program voltage bias when the loop count was last incremented. BSPF criterion is applied for each programmed state. Advancement to the next loop only occurs if a programmed state is determined incomplete.