NVMe Non-Contiguous Queue Management via Segmented PRP Lists
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Solution Overview
Problem
The existing NVMe submission and completion queue mechanisms face challenges in managing Physical Region Page (PRP) lists, particularly in reducing PCIe traffic and power consumption while maintaining performance and handling low power modes, due to the need for additional storage and potential performance degradation.
Innovation Solution
A hybrid approach is adopted where PRP lists are stored in DRAM and pointers are stored in always-on memory, allowing for efficient retrieval and reconstruction of PRP lists during errors or low power mode transitions, reducing the need for continuous PCIe communication and optimizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PRP lists are stored in DRAM, then access speed is improved, but power consumption increases and memory requirements increase
Solution Approach 1:
The PRP list storage is segmented into two parts: frequently accessed PRP list data is stored in DRAM for fast access, while less frequently accessed data is stored in non-volatile memory. This segmentation allows the system to optimize for both speed and power consumption by loading only necessary portions into DRAM.
Solution Approach 2:
The system performs preliminary actions by pre-loading PRP list data into DRAM before it is needed, or caching frequently accessed portions. This allows the DRAM to be populated in advance during low-power states, so that when full performance is needed, the data is already available without requiring continuous high-power operation.
2Use of energy by moving object
If PRP lists are stored in non-volatile memory, then power consumption is reduced, but access speed decreases
Solution Approach 1:
The PRP list storage is segmented into two parts: frequently accessed PRP list data is stored in DRAM for fast access, while less frequently accessed data is stored in non-volatile memory. This segmentation allows the system to optimize for both speed and power consumption by loading only necessary portions into DRAM.
Solution Approach 2:
The system dynamically adjusts the storage location of PRP list data based on access patterns and power state. During active high-performance modes, data is kept in DRAM for fast access. During low-power modes, the system can transition to using non-volatile memory storage, dynamically adapting to current operational requirements.
3Speed
If PRP lists are cached in memory, then access speed is improved, but additional storage requirements increase
Solution Approach 1:
The PRP list storage is segmented into two parts: frequently accessed PRP list data is stored in DRAM for fast access, while less frequently accessed data is stored in non-volatile memory. This segmentation allows the system to optimize for both speed and power consumption by loading only necessary portions into DRAM.
Solution Approach 2:
Different portions of the PRP list are stored with different qualities: hot data that requires frequent access is stored in fast DRAM, while cold data is stored in slower non-volatile memory. This local quality differentiation ensures that only the necessary amount of fast memory is used, optimizing the balance between access speed and storage requirements.
Data Source
AI summary
Systems and methods for processing non-contiguous submission and completion queues are disclosed. Non-Volatile Memory Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on a host device placing commands into the submission queue. The submission and completion queues may be contiguous or non-contiguous in host device memory. Non-contiguous queues may be defined by a link to a list on the host device that lists the non-contiguous sections in memory. In practice, the memory device stores the list in one type of memory (such as a dynamic random access memory (DRAM) cache) and the link in a different type of memory (such as always-on memory or non-volatile memory). In this way, the link may be accessed in various modes (such as low power mode) in order to recreate the list in DRAM. At least a part of the list of non-contiguous sections may be restored in response to the memory device exiting low power mode, or in response to determining that part or all of the list of noncontiguous sections is corrupted. The list of non-contiguous sections may comprise a list of physical region pages.