Aggregating NVMe Status Information for SOC Debugging

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Solution Overview

Problem

Debugging and analyzing embedded and system on chip (SOC) systems is challenging due to their real-time nature and complexity, as existing techniques are insufficient for visualizing and correlating status information across multiple functional modules, especially in large-scale storage systems with hundreds or thousands of controllers.

Innovation Solution

A process that generates and stores timestamped and aggregated messages in a standardized format, allowing for detailed analysis of functional modules by using reporting rules to collect and send status information from each module to an aggregation module, which then inserts timestamps for cross-referencing and storage, enabling better visualization and debugging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Difficulty of detecting and measuring

If invasive debug probes are added at key locations, then debugging capability is improved, but device complexity and ease of manufacture worsen

Engineering Contradiction:
Improvedebugging capabilityVSAvoiddevice complexity
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary debugging system that collects status information from multiple functional modules through standardized interfaces and aggregates it into a unified message stream. This intermediary layer enables comprehensive debugging without requiring invasive probes in each module, thus improving debugging capability while avoiding the complexity of direct physical access to numerous internal points.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a virtual copy of the system's operational state by aggregating status information from all functional modules into a standardized message stream. This copy allows external analysis and debugging without physically accessing or modifying the original system components, eliminating the need for invasive probes while maintaining full observability.

Inventive Principle:
Principle #26Copying

2Difficulty of detecting and measuring

If brute force debug is used in simple systems, then debugging capability is improved, but productivity worsens

Engineering Contradiction:
Improvedebugging capabilityVSAvoidproductivity
Core Design Contradiction:
Difficulty of detecting and measuringVSProductivity

Solution Approach 1:

The patent implements preliminary action by having functional modules proactively generate and send status information to the aggregation module during normal operation. This pre-captured data is organized into a standardized message stream with timestamps, enabling efficient post-event analysis without requiring time-consuming brute force debugging methods when issues occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent establishes a continuous feedback loop where functional modules automatically report their status information to the aggregation module, which then makes this data available for analysis. This automated feedback mechanism eliminates the need for manual, time-consuming debugging interventions while maintaining high productivity during both normal operation and troubleshooting.

Inventive Principle:
Principle #23Feedback

3Difficulty of detecting and measuring

If probes are added at easily accessed points in distributed systems, then debugging capability is improved, but measurement precision worsens

Engineering Contradiction:
Improvedebugging capabilityVSAvoidmeasurement precision
Core Design Contradiction:
Difficulty of detecting and measuringVSMeasurement precision

Solution Approach 1:

The patent segments the debugging function into two independent parts: (1) functional modules that generate status information at their own precise locations, and (2) an aggregation module that collects and organizes this information. This segmentation allows each module to report with high precision from its own context without requiring physical access points, maintaining measurement precision while enabling comprehensive debugging across distributed systems.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a precise virtual representation of the distributed system's state by collecting status information from each functional module's local context. This copied data stream preserves the precision of local measurements while aggregating them into a unified view, avoiding the loss of precision that would occur with external probes at accessible but non-representative points.

Inventive Principle:
Principle #26Copying

4Loss of information

If status information from multiple functional modules is collected and aggregated into a standardized message stream with timestamps, then analysis capability is improved, but device complexity worsens

Engineering Contradiction:
Improveanalysis capabilityVSAvoiddevice complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent implements a universal aggregation module that handles multiple functions: collecting status information from diverse functional modules, standardizing the data format, adding timestamps, and organizing the message stream. This single multi-functional component enables comprehensive analysis across the entire system without requiring separate complex infrastructure for each function, thus improving analysis capability while controlling overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12197356B2Collection of runtime information for debug and analysis, including by aggregating status information into a standardized message format and timestamping
Publication Date: 2025.01.14 NANJING TENAFE ELECTRONIC TECHNOLOGY CO LTD
  • US12197356B2 patent drawing
  • US12197356B2 patent drawing
  • US12197356B2 patent drawing

AI summary

If a first group selection setting is set to TRUE, an NVM Express (NVMe) processor sends a first set of NVMe status information that includes a transfer data end event. If a second group selection setting is set to TRUE, the NVMe processor sends a second set of NVMe status information that includes an NVMe error event. A firmware functional module sends firmware status information. The aggregation module aggregates and timestamps the first and second sets of NVMe status information, if any, and the firmware status information to obtain a timestamped and aggregated message stream that is output by an interface. The timestamped and aggregated message stream enables a visualization system to analyze the NVMe processor and the firmware functional module. The NVMe processor, firmware functional module, aggregation module, and interface are in a storage controller, implemented on a system on chip (SOC), that manages a storage medium.