NVMe Storage Controller Dynamic Buffer Management
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Solution Overview
Problem
Current NVMe over Fabric architectures require significant memory space and high processor utilization due to high completion latency in read and write operations, as they need to apply for storage space in advance and wait for completion messages before data transmission, which is inefficient for applications sensitive to data latency.
Innovation Solution
A storage device with a control module that uses virtual addresses to update and manage data read-write instructions, dividing the buffer module into multiple buffer units, allowing for data transmission without pre-allocating storage space and releasing buffer units upon completion, thereby optimizing data processing and reducing memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If storage space is pre-allocated in the buffer module, then data transmission can be ensured, but memory requirements increase and buffer units cannot be efficiently reused
Solution Approach 1:
The buffer unit allocation is made dynamic rather than static. Buffer units are allocated on-demand based on actual data transmission needs, and released immediately after use. The control module dynamically manages the buffer unit pool, allocating K buffer units for each data transmission task and releasing them upon completion, allowing the same buffer units to be reused for subsequent transmissions.
Solution Approach 2:
Buffer units are discarded (released) immediately after data transmission completes, rather than being held for the entire task duration. The control module recovers buffer units by releasing them back to the pool as soon as transmission is done, making them available for reuse by other data transmission tasks, thus reducing the total memory requirement.
2Reliability
If completion messages are waited for before data transmission, then data integrity is ensured, but completion latency increases
Solution Approach 1:
The control module performs preliminary actions by pre-establishing the buffer unit pool and virtual address mapping before data transmission begins. Buffer units are pre-configured and ready for immediate use, and the mapping relationship between virtual addresses and buffer units is established in advance, eliminating the need to wait for completion messages before starting transmission.
Solution Approach 2:
Data transmission proceeds continuously without interruption or waiting. Once buffer units are allocated and data is written to them, transmission starts immediately and continues without pausing for completion messages. The system maintains continuous useful action by keeping the data transmission pipeline flowing without idle waiting periods.
3Productivity
If processor handles command conversion and interrupt processing, then command processing is completed, but processor utilization rate becomes excessively high
Solution Approach 1:
The control module extracts and handles specific functions (buffer management, virtual address mapping, data transmission coordination) independently from the processor. By taking out these functions from the processor's workload, the processor is relieved of some responsibilities, reducing its utilization rate while maintaining command processing capability.
Solution Approach 2:
The control module serves itself by autonomously managing buffer unit allocation, virtual address mapping, and data transmission without requiring continuous processor intervention. This self-service capability reduces the burden on the processor, allowing it to focus on higher-level command processing while the control module handles routine buffer management tasks.
Data Source
AI summary
The present disclosure relates to a storage device and a storage system. The device comprises a storage, a storage controller, a control module, and a buffer module. The control module is configured to: when receiving a data read-write instruction, update the data read-write instruction by using a virtual address; apply for K buffer units in the buffer module; perform a write operation on the K buffer units by using data to be read and written; and when any of the K buffer units is full, directly start data transmission of the full buffer unit. By using the virtual storage address and by employing data block management, the present disclosure can update and forward an NVMe I/O command without applying for a storage space in advance, and can start data block transmission without checking the completion message.