NVMe Companion Namespace for Sub-Block Memory Access
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Solution Overview
Problem
Conventional memory sub-systems face inefficiencies in data transfer due to read and memory amplification caused by accessing data at block levels, which is larger than the required data granularity, leading to increased overhead and latency, particularly in applications with small spatial locality data patterns.
Innovation Solution
Implementing a companion NVMe memory namespace that allows sub block access through a fixed mapping between memory and block namespaces, using a sub block descriptor within NVMe commands to transfer only the required data portion, reducing overhead and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If block level access is used in conventional memory sub-systems, then data transfer simplicity is maintained, but read amplification and memory amplification occur due to transferring larger data portions than required
Solution Approach 1:
The patent introduces sub block level access as a segmentation of the traditional block level access. By dividing blocks into smaller sub blocks, the system can transfer only the necessary data portion rather than the entire block, reducing read amplification and improving data transfer efficiency for applications with small spatial locality data patterns.
Solution Approach 2:
The patent implements dynamic data transfer granularity by allowing the memory sub-system to adaptively select between block level and sub block level access based on the actual data access requirements. This dynamic approach enables the system to optimize performance for different workloads, switching from fixed block access to flexible sub block access when needed.
2Ease of operation
If block level access is used, then memory access simplicity is maintained, but latency increases due to transferring larger data portions than required
Solution Approach 1:
By segmenting blocks into sub blocks, the system can perform more targeted data transfers that reduce latency. The sub block access mechanism maintains simplicity through a fixed mapping between memory and block namespaces, while achieving faster access by transferring only necessary data portions.
Solution Approach 2:
The patent introduces a sub block descriptor as an intermediary structure that enables sub block level access. This descriptor contains information about the desired sub block access and works with the fixed mapping between memory and block namespaces to achieve efficient data transfer without complicating the overall access mechanism.
3Measurement precision
If sub block access is implemented with a companion NVMe memory namespace, then data transfer precision is improved, but device complexity increases
Solution Approach 1:
The patent implements a companion NVMe memory namespace that provides multi-functionality by supporting both block level access (through the block namespace) and sub block level access (through the memory namespace). This universal approach allows a single system to handle different data access requirements without requiring separate systems, thereby managing complexity while improving precision.
Solution Approach 2:
The patent creates a companion memory namespace that copies the structure of the block namespace but operates at a finer granularity. This copying approach allows sub block access to be implemented as a parallel namespace structure, making the complexity manageable through systematic duplication rather than fundamental redesign.
4Adaptability or versatility
If conventional block level access is used, then system compatibility is maintained, but overhead increases due to transferring larger data portions than required
Solution Approach 1:
The patent implements a dynamic access mechanism that can switch between block level and sub block level access based on workload requirements. This dynamic capability maintains compatibility with existing NVMe specifications for block access while adding the ability to reduce overhead through sub block access when needed, thereby adapting to different scenarios without sacrificing compatibility.
Solution Approach 2:
By segmenting the data access mechanism into block level and sub block level interfaces, the patent maintains compatibility with conventional NVMe block access while adding finer-grained access capability. The segmentation allows the system to use simple block access for compatibility-critical scenarios and optimized sub block access when overhead reduction is prioritized.
Data Source
AI summary
A memory sub-system, having: a host interface operatable on a computer bus; a non-volatile memory; and a controller. In response to a request to create a first namespace, the controller create the first namespace and a second namespace having a same storage capacity as the first namespace. The first namespace has a first granularity level; and the second namespace has a second granularity level different from the first granularity level. The first namespace and the second namespace represent a storage capacity provided by a same set of storage resources in the memory sub-system. The controller maintains a mapping between logical addresses defined in the first namespace and physical addresses of the set of storage resources, and process access to addresses in the second namespace via the mapping between logical addresses defined in the first namespace and physical addresses of the set of storage resources.