NVMe-oF Target Offload Engines for Lower CPU Packet Processing

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Solution Overview

Problem

The use of a central processing unit (CPU) to process access requests to remote SSDs via NVMe over Fabrics (NVMe-oF) degrades overall processing performance.

Innovation Solution

A hardware-based accelerating apparatus for NVMe-oF targets, incorporating a first offload engine to offload the network stack and a second offload engine to offload the NVMe-oF stack, which processes packet payloads and generates buffer addresses, reducing CPU usage and improving data processing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a CPU is used to process access requests to remote SSDs via NVMe-oF, then the processing capability is sufficient, but the overall processing performance degrades due to increased CPU usage

Engineering Contradiction:
Improveprocessing performanceVSAvoidCPU usage
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the network stack and NVMe-oF stack processing functions from the CPU and implements them in dedicated hardware offload engines. The first offload engine handles network stack operations for receiving and transmitting packets, while the second offload engine handles NVMe-oF stack operations for processing submission queue entries and completion queue entries. This extraction eliminates the need for CPU intervention in these routine operations, thereby reducing CPU usage and improving overall processing performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces offload engines as intermediary hardware components between the network and the CPU. These offload engines act as mediators that handle protocol processing, packet parsing, and queue management tasks, allowing the CPU to focus on higher-level operations. The offload engines translate network packets into NVMe commands and manage the interaction between network interfaces and storage devices without requiring CPU involvement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If hardware offload engines are introduced to reduce CPU usage, then processing performance improves, but device complexity increases

Engineering Contradiction:
Improvedata processing performanceVSAvoidapparatus complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the processing functions into distinct hardware modules: a first offload engine dedicated to network stack operations and a second offload engine dedicated to NVMe-oF stack operations. This segmentation allows each engine to be optimized for its specific function while working together in a coordinated manner. The first offload engine processes network packets and extracts commands, while the second offload engine processes submission queue entries and manages completion queues, creating a modular architecture that improves performance without overwhelming complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260067240A1Hardware-based accelerating apparatus for nvme over fabrics target, operation method thereof, and system including the same
Publication Date: 2026.03.05 MANGOBOOST INC
  • US20260067240A1 patent drawing
  • US20260067240A1 patent drawing
  • US20260067240A1 patent drawing

AI summary

A non-volatile memory express over fabrics (NVMe-oF) target accelerating apparatus according to an embodiment of the present disclosure includes: a first offload engine configured to offload a network stack to compute a first network packet and output a first packet payload; and a second offload engine configured to offload an NVMe-oF stack to compute the first packet payload and output data having a first buffer address when the first packet payload is of a first type.