NVMe Trace Capture via BIOS Error Triggering
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Solution Overview
Problem
Current methods for capturing NVME hard disc traces in server systems are inefficient due to limited trigger types in protocol analysis instruments and the need for customizing BIOS, making it difficult to handle complex errors and reproduce faults, leading to wasted efforts and resources.
Innovation Solution
A system comprising a BMC, BIOS, fixture plate, and protocol analysis instrument, where the BIOS acquires and sends register error information to the BMC, which triggers the protocol analysis instrument via a dial switch to capture PCIe traces without customizing BIOS or triggers for specific error types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If BIOS customization is performed for different error types, then trace capture precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent implements a universal trigger mechanism in the BIOS that can handle multiple error types through a single standardized interface. The BIOS includes a trigger module that receives various error types (UNC, CRC, timeout, etc.) and converts them into a unified trigger signal for the protocol analysis instrument, eliminating the need for separate customization for each error type while maintaining precise trace capture capability.
Solution Approach 2:
The patent introduces an error type judgment module as an intermediary between the error detection module and the trigger module. This intermediary component automatically identifies and categorizes different error types, then routes them through a standardized process, reducing the complexity of direct BIOS customization for each specific error type while preserving measurement precision.
2Ease of manufacture
If protocol analysis instrument buffer capacity is limited, then device cost is reduced, but trace capture completeness deteriorates
Solution Approach 1:
The patent implements a preliminary trigger mechanism that activates the protocol analysis instrument exactly when an error occurs, rather than continuously recording. The trigger module monitors for specific error conditions and only initiates trace capture when needed, ensuring that critical error traces are captured completely while minimizing buffer usage and device cost.
Solution Approach 2:
The patent employs a targeted capture approach where the protocol analysis instrument skips normal operation recording and directly captures error-related traces when triggered. This allows the limited buffer capacity to be focused on capturing critical error information rather than storing continuous operation data, maintaining trace completeness for errors while reducing overall device cost.
3Productivity
If PCIe interface transfer rate is high, then data throughput is improved, but trace reproduction difficulty increases
Solution Approach 1:
The patent replaces manual trace analysis methods with an automated trigger-based capture system. The trigger module automatically detects error conditions and initiates trace recording, eliminating the need for manual intervention in high-speed PCIe environments. This substitution enables effective trace capture and reproduction despite the high data transfer rates that would otherwise make manual detection impractical.
Data Source
AI summary
A system for capturing a trace of an NVME hard disc can include a BMC, a BIOS, a protocol analysis instrument, and a fixture plate comprising a processor and a dial switch. The BIOS is configured to acquire register error information of the PCIe link when an error occurs to a PCIe link where the NVME hard disc is located, and send the register error information to the BMC, and the BMC is configured to send the received information to the fixture plate, and the fixture plate is configured to trigger the protocol analysis instrument to capture a PCIe trace of the NVME hard disc when a current error type corresponding to the dial switch is consistent with the error type of the register error information parsed by a processor of the fixture plate.