NVMe-oF TCP Polling Groups for Latency Determinism

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Solution Overview

Problem

NVMe-oF over TCP transactions face performance determinism challenges, particularly in data centers, due to networking interface bottlenecks that contribute to indeterminate latency and tail latency, which can impact application performance.

Innovation Solution

Implementing an Application Device Queue (ADQ) and a busy polling scheme with dedicated and isolated queues to reduce system calls and context switches, along with hardware offloading to optimize CPU resource usage and improve packet processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional networking interface processing is used, then system compatibility is maintained, but latency and tail latency increase due to networking interface bottlenecks

Engineering Contradiction:
ImprovelatencyVSAvoidqueue management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the networking interface processing by creating multiple isolated queues (first queue, second queue, third queue) that are dedicated to specific polling groups. This segmentation prevents bottlenecks by distributing traffic across multiple independent processing paths, thereby reducing latency while maintaining manageable complexity through structured queue assignment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of queue isolation by implementing queues that can only be accessed by specific polling groups. This dimensional separation in the queue access model creates independent processing lanes that eliminate contention and reduce latency without significantly increasing operational complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If more queues and polling groups are implemented, then latency is reduced, but system complexity increases

Engineering Contradiction:
Improvetail latencyVSAvoidqueue and polling group configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies local quality by assigning specific characteristics to different queues - the first queue is dedicated to a first polling group, the second queue to a second polling group, and the third queue to the first polling group. This localized optimization allows each polling group to have dedicated resources where needed, reducing tail latency while keeping the overall system complexity manageable through consistent assignment patterns.

Inventive Principle:
Principle #3Local quality

3Productivity

If CPU resources are allocated to handle networking transactions, then processing capability is maintained, but CPU utilization efficiency decreases due to context switches and system calls

Engineering Contradiction:
ImproveCPU utilization efficiencyVSAvoidcontext switch time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements continuous useful action by enabling polling groups to continuously poll their dedicated queues without interruption from context switches. The isolated queue architecture ensures that each polling group can maintain continuous processing of its assigned transactions, eliminating the need for frequent context switches and system calls, thereby improving CPU utilization efficiency while reducing the time lost to context switching.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS12153962B2Storage transactions with predictable latency
Publication Date: 2024.11.26 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US12153962B2 patent drawing
  • US12153962B2 patent drawing
  • US12153962B2 patent drawing

AI summary

The disclosure concerns at least one processor that can execute a polling group to poll for storage transactions associated with a first group of one or more particular queue identifiers. The disclosure concerns at least one processor is configured to: execute a second polling group on a second processor, wherein the second polling group is to poll for storage transactions for a second group of one or more particular queue identifiers that are different than the one or more particular queue identifiers of the first group, wherein the second group of one or more particular queue identifiers are associated with one or more queues that can be accessed using the second polling group and not the first polling group.